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Searched refs:cpu_V0 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate.c47 static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; variable
1474 iwmmxt_load_reg(cpu_V0, rd); in gen_iwmmxt_shift()
1475 tcg_gen_extrl_i64_i32(tmp, cpu_V0); in gen_iwmmxt_shift()
1497 iwmmxt_load_reg(cpu_V0, wrd); in disas_iwmmxt_insn()
1498 tcg_gen_extrl_i64_i32(cpu_R[rdlo], cpu_V0); in disas_iwmmxt_insn()
1502 iwmmxt_store_reg(cpu_V0, wrd); in disas_iwmmxt_insn()
2508 iwmmxt_load_reg(cpu_V0, acc); in disas_dsp_insn()
2509 tcg_gen_extrl_i64_i32(cpu_R[rdlo], cpu_V0); in disas_dsp_insn()
2510 tcg_gen_extrh_i64_i32(cpu_R[rdhi], cpu_V0); in disas_dsp_insn()
2514 iwmmxt_store_reg(cpu_V0, acc); in disas_dsp_insn()
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