Searched refs:cpu_SR (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/target/xtensa/ |
| H A D | translate.c | 399 tcg_gen_deposit_i32(cpu_SR[PS], cpu_SR[PS], in gen_callw_slot()
412 tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1); in gen_check_loop_end()
1806 tcg_gen_add2_i32(cpu_SR[ACCLO], cpu_SR[ACCHI], in translate_mac16()
1807 cpu_SR[ACCLO], cpu_SR[ACCHI], in translate_mac16()
1810 tcg_gen_sub2_i32(cpu_SR[ACCLO], cpu_SR[ACCHI], in translate_mac16()
1811 cpu_SR[ACCLO], cpu_SR[ACCHI], in translate_mac16()
1814 tcg_gen_ext8s_i32(cpu_SR[ACCHI], cpu_SR[ACCHI]); in translate_mac16()
2069 tcg_gen_andi_i32(cpu_SR[PS], cpu_SR[PS], ~PS_EXCM); in translate_rfe()
2085 tcg_gen_andi_i32(cpu_SR[PS], cpu_SR[PS], ~PS_EXCM); in translate_rfw()
2110 tcg_gen_andi_i32(cpu_SR[PS], cpu_SR[PS], ~PS_INTLEVEL); in translate_rsil()
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