Searched refs:cpu_R (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/target/openrisc/ |
| H A D | translate.c | 168 static TCGv_i32 cpu_R(DisasContext *dc, int reg) in cpu_R() 410 gen_add(dc, cpu_R(dc, a->d), cpu_R(dc, a->a), cpu_R(dc, a->b)); in gen_msbu() 417 gen_addc(dc, cpu_R(dc, a->d), cpu_R(dc, a->a), cpu_R(dc, a->b)); in gen_msbu() 424 gen_sub(dc, cpu_R(dc, a->d), cpu_R(dc, a->a), cpu_R(d in trans_l_add() 162 static TCGv cpu_R(DisasContext *dc, int reg) cpu_R() function [all...] |
| /openbmc/qemu/target/microblaze/ |
| H A D | translate.c | 50 static TCGv_i32 cpu_R[32]; variable 177 return cpu_R[reg]; in reg_for_read() 185 return cpu_R[reg]; in reg_for_write() 606 tcg_gen_add_i32(ret, cpu_R[ra], cpu_R[rb]); in DO_TYPEA() 608 ret = cpu_R[ra]; in DO_TYPEA() 610 ret = cpu_R[rb]; in DO_TYPEA() 628 tcg_gen_addi_i32(ret, cpu_R[ra], imm); in compute_ldst_addr_typeb() 630 ret = cpu_R[ra]; in compute_ldst_addr_typeb() 649 tcg_gen_extu_i32_i64(ret, cpu_R[r in compute_ldst_addr_ea() [all...] |
| /openbmc/qemu/target/arm/tcg/ |
| H A D | translate.c | 48 static TCGv_i32 cpu_R[16]; 64 cpu_R[i] = tcg_global_mem_new_i32(tcg_env, in arm_translate_init() 265 tcg_gen_addi_i32(var, cpu_R[15], (s->pc_curr - s->pc_save) + diff); in gen_pc_plus_diff() 277 tcg_gen_mov_i32(var, cpu_R[reg]); in load_reg_var() 297 tcg_gen_addi_i32(tmp, cpu_R[reg], ofs); in add_reg_for_lit() 322 tcg_gen_andi_i32(cpu_R[reg], var, ~mask); in store_reg() 743 gen_pc_plus_diff(s, cpu_R[15], diff); in gen_update_pc() 751 tcg_gen_andi_i32(cpu_R[15], var, ~1); in gen_bx() 808 tcg_gen_brcondi_i32(TCG_COND_GEU, cpu_R[15], min_magic, excret_label.label); in gen_bx_excret_final_code() 1162 gen_pc_plus_diff(s, cpu_R[1 in neon_element_offset() 50 static TCGv_i32 cpu_R[16]; global() variable [all...] |
| /openbmc/qemu/target/xtensa/ |
| H A D | translate.c | 81 static TCGv_i32 cpu_R[16]; variable 160 cpu_R[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init() 250 (void *)"AR 16x32", (void *)cpu_R); in xtensa_get_regfile_by_name() 252 (void *)"AR 32x32", (void *)cpu_R); in xtensa_get_regfile_by_name() 254 (void *)"AR 64x32", (void *)cpu_R); in xtensa_get_regfile_by_name() 400 tcg_gen_movi_i32(cpu_R[callinc << 2], in gen_callw_slot() 1457 tcg_gen_movi_i32(cpu_R[0], dc->base.pc_next); in translate_call0() 1473 tcg_gen_movi_i32(cpu_R[0], dc->base.pc_next); in translate_callx0() 2001 gen_jump(dc, cpu_R[0]); in translate_ret() 2027 tcg_gen_deposit_i32(tmp, tmp, cpu_R[ in translate_retw() [all...] |