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Searched refs:cpu1intr (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/misc/
H A Darmsse-mhu.c61 qemu_set_irq(s->cpu1irq, s->cpu1intr != 0); in armsse_mhu_update()
75 r = s->cpu1intr; in armsse_mhu_read()
117 s->cpu1intr |= (value & INTR_MASK); in armsse_mhu_write()
120 s->cpu1intr &= ~(value & INTR_MASK); in armsse_mhu_write()
153 s->cpu1intr = 0; in armsse_mhu_reset()
162 VMSTATE_UINT32(cpu1intr, ARMSSEMHU),
/openbmc/qemu/include/hw/misc/
H A Darmsse-mhu.h42 uint32_t cpu1intr; member