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Searched refs:cppr (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/arch/powerpc/sysdev/xics/
H A Dicp-hv.c21 static inline unsigned int icp_hv_get_xirr(unsigned char cppr) in icp_hv_get_xirr() argument
27 rc = plpar_hcall(H_XIRR, retbuf, cppr); in icp_hv_get_xirr()
32 __func__, cppr, rc); in icp_hv_get_xirr()
128 static void icp_hv_set_cpu_priority(unsigned char cppr) in icp_hv_set_cpu_priority() argument
130 xics_set_base_cppr(cppr); in icp_hv_set_cpu_priority()
131 icp_hv_set_cppr(cppr); in icp_hv_set_cpu_priority()
H A Dicp-opal.c89 static void icp_opal_set_cpu_priority(unsigned char cppr) in icp_opal_set_cpu_priority() argument
98 if (cppr >= DEFAULT_PRIORITY) in icp_opal_set_cpu_priority()
99 cppr = LOWEST_PRIORITY; in icp_opal_set_cpu_priority()
101 xics_set_base_cppr(cppr); in icp_opal_set_cpu_priority()
102 opal_int_set_cppr(cppr); in icp_opal_set_cpu_priority()
H A Dicp-native.c80 static void icp_native_set_cpu_priority(unsigned char cppr) in icp_native_set_cpu_priority() argument
82 xics_set_base_cppr(cppr); in icp_native_set_cpu_priority()
83 icp_native_set_cppr(cppr); in icp_native_set_cpu_priority()
/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_hv_rm_xics.c182 new.out_ee = (new.xisr && (new.pending_pri < new.cppr)); in icp_rm_try_update()
251 success = new_state.cppr > priority && in icp_rm_try_to_deliver()
448 new_state.cppr = new_cppr; in icp_rm_down_cppr()
511 xirr = old_state.xisr | (((u32)old_state.cppr) << 24); in xics_rm_h_xirr()
514 new_state.cppr = new_state.pending_pri; in xics_rm_h_xirr()
583 if (mfrr < new_state.cppr) { in xics_rm_h_ipi()
630 if (cppr > icp->state.cppr) { in xics_rm_h_cppr()
631 icp_rm_down_cppr(xics, icp, cppr); in xics_rm_h_cppr()
633 } else if (cppr == icp->state.cppr) in xics_rm_h_cppr()
653 new_state.cppr = cppr; in xics_rm_h_cppr()
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H A Dbook3s_xics.c351 success = new_state.cppr > priority && in icp_try_to_deliver()
552 new_state.cppr = new_cppr; in icp_down_cppr()
608 new_state.cppr = new_state.pending_pri; in kvmppc_h_xirr()
678 if (mfrr < new_state.cppr) { in kvmppc_h_ipi()
737 if (cppr > icp->state.cppr) in kvmppc_h_cppr()
738 icp_down_cppr(xics, icp, cppr); in kvmppc_h_cppr()
739 else if (cppr == icp->state.cppr) in kvmppc_h_cppr()
759 new_state.cppr = cppr; in kvmppc_h_cppr()
761 if (cppr <= new_state.pending_pri) { in kvmppc_h_cppr()
1107 u8 cppr, mfrr, pending_pri; in kvmppc_xics_set_icp() local
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H A Dbook3s_xive.c41 u8 cppr; in xive_vm_ack_pending() local
63 cppr = ack & 0xff; in xive_vm_ack_pending()
64 if (cppr < 8) in xive_vm_ack_pending()
77 xc->hw_cppr = cppr; in xive_vm_ack_pending()
272 xc->cppr = prio; in xive_vm_scan_interrupts()
467 cppr = xive_prio_from_guest(cppr); in xive_vm_h_cppr()
471 xc->cppr = cppr; in xive_vm_h_cppr()
1496 u8 cppr, mfrr; in kvmppc_xive_set_icp() local
1520 vcpu->arch.xive_saved_state.cppr = cppr; in kvmppc_xive_set_icp()
1521 xc->hw_cppr = xc->cppr = cppr; in kvmppc_xive_set_icp()
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H A Dbook3s_xics.h56 u8 cppr; member
149 extern int xics_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr);
H A Dbook3s_xive.h173 uint8_t cppr; /* guest CPPR */ member
H A Dbook3s_xive_native.c1165 vcpu->arch.xive_saved_state.cppr, in kvmppc_xive_native_get_vp()
1233 vcpu->arch.xive_saved_state.cppr, in xive_native_debug_show()
H A Dbook3s_hv.c4285 vcpu->arch.xive_saved_state.cppr; in xive_interrupt_pending()
/openbmc/linux/arch/powerpc/sysdev/xive/
H A Dnative.c343 u8 he, cppr; in xive_native_update_pending() local
356 cppr = ack & 0xff; in xive_native_update_pending()
362 if (cppr == 0xff) in xive_native_update_pending()
365 xc->pending_prio |= 1 << cppr; in xive_native_update_pending()
371 if (cppr >= xc->cppr) in xive_native_update_pending()
373 smp_processor_id(), cppr, xc->cppr); in xive_native_update_pending()
376 xc->cppr = cppr; in xive_native_update_pending()
H A Dspapr.c605 u8 nsr, cppr; in xive_spapr_update_pending() local
624 cppr = ack & 0xff; in xive_spapr_update_pending()
628 if (cppr == 0xff) in xive_spapr_update_pending()
631 xc->pending_prio |= 1 << cppr; in xive_spapr_update_pending()
637 if (cppr >= xc->cppr) in xive_spapr_update_pending()
639 smp_processor_id(), cppr, xc->cppr); in xive_spapr_update_pending()
642 xc->cppr = cppr; in xive_spapr_update_pending()
H A Dcommon.c204 if (prio != xc->cppr) { in xive_scan_interrupts()
206 xc->cppr = prio; in xive_scan_interrupts()
276 xmon_printf("pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr); in xmon_xive_do_dump()
1521 xc->cppr = 0xff; in xive_setup_cpu()
1613 xc->cppr = 0; in xive_smp_disable_cpu()
1620 xc->cppr = 0xff; in xive_smp_disable_cpu()
1643 xc->cppr = 0; in xive_teardown_cpu()
1735 seq_printf(m, "pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr); in xive_debug_show_ipi()
H A Dxive-internal.h36 u8 cppr; member
/openbmc/linux/arch/powerpc/include/asm/
H A Dxics.h136 static inline void xics_set_base_cppr(unsigned char cppr) in xics_set_base_cppr() argument
145 os_cppr->stack[0] = cppr; in xics_set_base_cppr()
H A Dkvm_host.h501 u8 cppr; member
H A Dopal.h231 int64_t opal_int_set_cppr(uint8_t cppr);
/openbmc/qemu/hw/intc/
H A Dxics.c142 void icp_set_cppr(ICPState *icp, uint8_t cppr) in icp_set_cppr() argument
148 icp->xirr = (icp->xirr & ~CPPR_MASK) | (cppr << 24); in icp_set_cppr()
150 if (cppr < old_cppr) { in icp_set_cppr()
151 if (XISR(icp) && (cppr <= icp->pending_priority)) { in icp_set_cppr()
H A Dxive.c76 uint8_t cppr = regs[TM_PIPR]; in xive_tctx_accept() local
78 regs[TM_CPPR] = cppr; in xive_tctx_accept()
81 regs[TM_IPB] &= ~xive_priority_to_ipb(cppr); in xive_tctx_accept()
128 static void xive_tctx_set_cppr(XiveTCTX *tctx, uint8_t ring, uint8_t cppr) in xive_tctx_set_cppr() argument
134 cppr, regs[TM_NSR]); in xive_tctx_set_cppr()
136 if (cppr > XIVE_PRIORITY_MAX) { in xive_tctx_set_cppr()
137 cppr = 0xff; in xive_tctx_set_cppr()
140 tctx->regs[ring + TM_CPPR] = cppr; in xive_tctx_set_cppr()
H A Dxive2.c310 uint8_t cppr; in xive2_tctx_restore_os_ctx() local
318 cppr = xive_get_field32(NVP2_W2_CPPR, nvp->w2); in xive2_tctx_restore_os_ctx()
322 tctx->regs[TM_QW1_OS + TM_CPPR] = cppr; in xive2_tctx_restore_os_ctx()
339 return cppr; in xive2_tctx_restore_os_ctx()
H A Dxics_spapr.c64 target_ulong cppr = args[0]; in h_cppr() local
68 icp_set_cppr(spapr_cpu_state(cpu)->icp, cppr); in h_cppr()
H A Dtrace-events276 xive_tctx_accept(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr…
277 xive_tctx_notify(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr…
278 xive_tctx_set_cppr(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t n…
/openbmc/qemu/include/hw/ppc/
H A Dxics.h156 void icp_set_cppr(ICPState *icp, uint8_t cppr);