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Searched refs:cpll_con0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos5.c642 writel(val, &clk->cpll_con0); in exynos5250_system_clock_init()
643 while ((readl(&clk->cpll_con0) & CPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
871 writel(val, &clk->cpll_con0); in exynos5420_system_clock_init()
872 while ((readl(&clk->cpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h660 unsigned int cpll_con0; member
1046 unsigned int cpll_con0; /* 10020120 */ member