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Searched refs:core_dpll_params_2128mhz_ddr532 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c53 core_dpll_params_2128mhz_ddr532[NUM_SYS_CLKS] = { variable
220 .core = core_dpll_params_2128mhz_ddr532,