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Searched refs:cntr8clk (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi87 cntr8clk-cnt = <900>; /* Field: cntr8clk.cnt */
116 cntr8clk-cnt = <900>; /* Field: cntr8clk.cnt */
117 cntr8clk-src = <0>; /* Field: cntr8clk.src */
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_s10.c126 writel(0xff, &clock_manager_base->main_pll.cntr8clk); in cm_basic_init()
134 writel(0xff, &clock_manager_base->per_pll.cntr8clk); in cm_basic_init()
145 writel(cfg->main_pll_cntr8clk, &clock_manager_base->main_pll.cntr8clk); in cm_basic_init()
153 writel(cfg->per_pll_cntr8clk, &clock_manager_base->per_pll.cntr8clk); in cm_basic_init()
H A Dclock_manager_arria10.c764 writel(main_cfg->cntr8clk_cnt, &clock_manager_base->main_pll.cntr8clk); in cm_full_cfg()
799 &clock_manager_base->per_pll.cntr8clk); in cm_full_cfg()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h28 u32 cntr8clk; member
54 u32 cntr8clk; member
H A Dclock_manager_s10.h87 u32 cntr8clk; member
113 u32 cntr8clk; member