Searched refs:cmdreg (Results 1 – 6 of 6) sorted by relevance
76 uint16_t cmdreg) in sdhci_cmd_regs() argument82 qtest_writew(qts, base_addr + SDHC_CMDREG, cmdreg); in sdhci_cmd_regs()
64 uint16_t cmdreg);
27 unsigned short cmdreg; /* _CMD_XFER_MODE_0 31:16 cmd reg */ member
59 uint16_t cmdreg; /* Command Register */ member
345 request.cmd = s->cmdreg >> 8; in sdhci_send_command()351 if (s->cmdreg & SDHC_CMD_RESPONSE) { in sdhci_send_command()375 (s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY) { in sdhci_send_command()387 (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { in sdhci_send_command()998 ((s->cmdreg & SDHC_CMD_DATA_PRESENT) || in sdhci_can_issue_command()999 ((s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY && in sdhci_can_issue_command()1000 !(SDHC_COMMAND_TYPE(s->cmdreg) == SDHC_CMD_ABORT))))) { in sdhci_can_issue_command()1049 ret = s->trnmod | (s->cmdreg << 16); in sdhci_read()1248 MASKED_WRITE(s->cmdreg, mask >> 16, value >> 16); in sdhci_write()1518 VMSTATE_UINT16(cmdreg, SDHCIState),
212 writew((cmd->cmdidx << 8) | flags, &priv->reg->cmdreg); in tegra_mmc_send_cmd_bounced()