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Searched refs:cmd_reg (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/soc/qcom/
H A Dramp_controller.c51 u8 cmd_reg; member
82 ret = regmap_set_bits(r, d->cmd_reg, RC_ROOT_EN); in rc_wait_for_update()
86 return regmap_read_poll_timeout(r, d->cmd_reg, val, !(val & RC_UPDATE_EN), in rc_wait_for_update()
108 ret = regmap_set_bits(r, d->cmd_reg + RC_REG_CFG_UPDATE, ce); in rc_set_cfg_update()
113 ret = regmap_set_bits(r, d->cmd_reg + RC_REG_CFG_UPDATE, RC_CFG_UPDATE_EN); in rc_set_cfg_update()
118 ret = regmap_read_poll_timeout(r, d->cmd_reg + RC_REG_CFG_UPDATE, val, in rc_set_cfg_update()
129 ret = regmap_write(r, d->cmd_reg + RC_REG_CFG_UPDATE, 0); in rc_set_cfg_update()
134 return regmap_read_poll_timeout(r, d->cmd_reg + RC_REG_CFG_UPDATE, in rc_set_cfg_update()
282 .cmd_reg = 0x0,
/openbmc/linux/drivers/crypto/ccp/
H A Dplatform-access.c63 u32 cmd_reg; in psp_send_platform_access_msg() local
106 cmd_reg = FIELD_PREP(PSP_CMDRESP_CMD, msg); in psp_send_platform_access_msg()
107 iowrite32(cmd_reg, cmd); in psp_send_platform_access_msg()
128 cmd_reg = ioread32(cmd); in psp_send_platform_access_msg()
129 if (FIELD_GET(PSP_CMDRESP_STS, cmd_reg)) in psp_send_platform_access_msg()
130 req->header.status = FIELD_GET(PSP_CMDRESP_STS, cmd_reg); in psp_send_platform_access_msg()
/openbmc/qemu/hw/ipmi/
H A Dipmi_kcs.c111 if (ik->cmd_reg == IPMI_KCS_ABORT_STATUS_CMD) { in ipmi_kcs_handle_event()
125 if (ik->cmd_reg == IPMI_KCS_WRITE_START_CMD) { in ipmi_kcs_handle_event()
127 ik->cmd_reg = -1; in ipmi_kcs_handle_event()
172 } else if (ik->cmd_reg == IPMI_KCS_WRITE_END_CMD) { in ipmi_kcs_handle_event()
173 ik->cmd_reg = -1; in ipmi_kcs_handle_event()
188 if (ik->cmd_reg != -1) { in ipmi_kcs_handle_event()
197 ik->cmd_reg = -1; in ipmi_kcs_handle_event()
280 ik->cmd_reg = val; in ipmi_kcs_ioport_write()
396 VMSTATE_INT16(cmd_reg, IPMIKCS),
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Darasan_nfc.c30 u32 cmd_reg; member
282 reg_val = readl(&arasan_nand_base->cmd_reg); in arasan_nand_enable_ecc()
285 writel(reg_val, &arasan_nand_base->cmd_reg); in arasan_nand_enable_ecc()
626 u32 cmd_reg = 0; in arasan_nand_reset() local
630 cmd_reg = readl(&arasan_nand_base->cmd_reg); in arasan_nand_reset()
631 cmd_reg &= ~ARASAN_NAND_CMD_CMD12_MASK; in arasan_nand_reset()
633 cmd_reg |= curr_cmd->cmd1 | in arasan_nand_reset()
635 writel(cmd_reg, &arasan_nand_base->cmd_reg); in arasan_nand_reset()
696 reg_val = readl(&arasan_nand_base->cmd_reg); in arasan_nand_send_wrcmd()
714 writel(reg_val, &arasan_nand_base->cmd_reg); in arasan_nand_send_wrcmd()
[all …]
/openbmc/linux/arch/m68k/sun3/
H A Dintersil.c36 intersil_clock->cmd_reg = STOP_VAL; in sun3_hwclk()
62 intersil_clock->cmd_reg = START_VAL; in sun3_hwclk()
H A Dconfig.c156 intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE); in sun3_sched_init()
160 intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_ENABLE|INTERSIL_24H_MODE); in sun3_sched_init()
/openbmc/linux/drivers/mmc/host/
H A Ddavinci_mmc.c270 u32 cmd_reg = 0; in mmc_davinci_start_command() local
301 cmd_reg |= MMCCMD_BSYEXP; in mmc_davinci_start_command()
304 cmd_reg |= MMCCMD_RSPFMT_R1456; in mmc_davinci_start_command()
307 cmd_reg |= MMCCMD_RSPFMT_R2; in mmc_davinci_start_command()
310 cmd_reg |= MMCCMD_RSPFMT_R3; in mmc_davinci_start_command()
313 cmd_reg |= MMCCMD_RSPFMT_NONE; in mmc_davinci_start_command()
320 cmd_reg |= cmd->opcode; in mmc_davinci_start_command()
324 cmd_reg |= MMCCMD_DMATRIG; in mmc_davinci_start_command()
328 cmd_reg |= MMCCMD_DMATRIG; in mmc_davinci_start_command()
332 cmd_reg |= MMCCMD_WDATX; in mmc_davinci_start_command()
[all …]
/openbmc/linux/drivers/cxl/
H A Dpci.c197 u64 cmd_reg, status_reg; in __cxl_pci_mbox_send_cmd() local
240 cmd_reg = FIELD_PREP(CXLDEV_MBOX_CMD_COMMAND_OPCODE_MASK, in __cxl_pci_mbox_send_cmd()
246 cmd_reg |= FIELD_PREP(CXLDEV_MBOX_CMD_PAYLOAD_LENGTH_MASK, in __cxl_pci_mbox_send_cmd()
252 writeq(cmd_reg, cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET); in __cxl_pci_mbox_send_cmd()
345 cmd_reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET); in __cxl_pci_mbox_send_cmd()
346 out_len = FIELD_GET(CXLDEV_MBOX_CMD_PAYLOAD_LENGTH_MASK, cmd_reg); in __cxl_pci_mbox_send_cmd()
/openbmc/linux/drivers/parisc/
H A Dled.c398 int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg) in register_led_driver() argument
408 LCD_CMD_REG = (cmd_reg == LED_CMD_REG_NONE) ? 0 : cmd_reg; in register_led_driver()
/openbmc/linux/arch/parisc/include/asm/
H A Dled.h28 int register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
/openbmc/linux/arch/m68k/include/asm/
H A Dintersil.h43 unsigned char cmd_reg; member
/openbmc/qemu/include/hw/ipmi/
H A Dipmi_kcs.h51 int16_t cmd_reg; member
/openbmc/linux/drivers/mtd/nand/raw/
H A Darasan-nand-controller.c140 u32 cmd_reg; member
277 writel_relaxed(nfc_op->cmd_reg, nfc->base + CMD_REG); in anfc_trigger_op()
413 .cmd_reg = in anfc_read_page_hw_ecc()
531 .cmd_reg = in anfc_write_page_hw_ecc()
608 nfc_op->cmd_reg = CMD_PAGE_SIZE(anand->page_sz); in anfc_parse_instructions()
620 nfc_op->cmd_reg |= CMD_1(instr->ctx.cmd.opcode); in anfc_parse_instructions()
622 nfc_op->cmd_reg |= CMD_2(instr->ctx.cmd.opcode); in anfc_parse_instructions()
631 nfc_op->cmd_reg |= CMD_NADDRS(naddrs); in anfc_parse_instructions()
H A Dqcom_nandc.c476 u32 cmd_reg; member
2612 q_op->cmd_reg = ret; in qcom_parse_instructions()
2709 nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg); in qcom_read_status_exec()
2766 nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg); in qcom_read_id_type_exec()
2810 } else if (q_op.cmd_reg == OP_BLOCK_ERASE) { in qcom_misc_cmd_type_exec()
2811 q_op.cmd_reg |= PAGE_ACC | LAST_PAGE; in qcom_misc_cmd_type_exec()
2818 } else if (q_op.cmd_reg != OP_RESET_DEVICE) { in qcom_misc_cmd_type_exec()
2829 nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg); in qcom_misc_cmd_type_exec()
2833 if (q_op.cmd_reg == OP_BLOCK_ERASE) in qcom_misc_cmd_type_exec()
2867 q_op.cmd_reg |= PAGE_ACC | LAST_PAGE; in qcom_param_page_type_exec()
[all …]
/openbmc/linux/drivers/scsi/aic94xx/
H A Daic94xx_init.c154 u16 cmd_reg; in asd_map_ha() local
156 err = pci_read_config_word(asd_ha->pcidev, PCI_COMMAND, &cmd_reg); in asd_map_ha()
164 if (cmd_reg & PCI_COMMAND_MEMORY) { in asd_map_ha()
167 } else if (cmd_reg & PCI_COMMAND_IO) { in asd_map_ha()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dcmd_parser.c1033 #define cmd_reg(s, i) \ macro
1053 cmd_reg(s, i) == i915_mmio_reg_offset(DERRMR)) in cmd_handler_lri()
1060 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lri"); in cmd_handler_lri()
1079 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lrr-src"); in cmd_handler_lrr()
1082 ret |= cmd_reg_handler(s, cmd_reg(s, i + 1), i, "lrr-dst"); in cmd_handler_lrr()
1105 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lrm"); in cmd_handler_lrm()
1129 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "srm"); in cmd_handler_srm()
1192 ret = cmd_reg_handler(s, cmd_reg(s, 2), 1, "pipe_ctrl"); in cmd_handler_pipe_control()
/openbmc/linux/drivers/atm/
H A Diphase.h649 ffreg_t cmd_reg; /* Command register */ member
729 rreg_t cmd_reg; /* Command register */ member
/openbmc/linux/drivers/dma/qcom/
H A Dgpi.c691 void __iomem *cmd_reg; in gpi_send_cmd() local
706 cmd_reg = IS_CHAN_CMD(gpi_cmd) ? gchan->ch_cmd_reg : gpii->ev_cmd_reg; in gpi_send_cmd()
709 gpi_write_reg(gpii, cmd_reg, cmd); in gpi_send_cmd()
/openbmc/linux/drivers/usb/host/
H A Dxhci-ring.c1965 u32 portsc, cmd_reg; in handle_port_status() local
2028 cmd_reg = readl(&xhci->op_regs->command); in handle_port_status()
2029 if (!(cmd_reg & CMD_RUN)) { in handle_port_status()
/openbmc/linux/drivers/scsi/
H A Dadvansys.c8664 static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg) in AscWriteEEPCmdReg() argument
8670 AscSetChipEEPCmd(iop_base, cmd_reg); in AscWriteEEPCmdReg()
8673 if (read_back == cmd_reg) in AscWriteEEPCmdReg()
8687 uchar cmd_reg; in AscReadEEPWord() local
8691 cmd_reg = addr | ASC_EEP_CMD_READ; in AscReadEEPWord()
8692 AscWriteEEPCmdReg(iop_base, cmd_reg); in AscReadEEPWord()
H A Dipr.c8189 u16 cmd_reg; in ipr_reset_alert() local
8193 rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg); in ipr_reset_alert()
8195 if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) { in ipr_reset_alert()