| /openbmc/qemu/include/hw/ |
| H A D | clock.h | 188 bool clock_set(Clock *clk, uint64_t value);
192 return clock_set(clk, CLOCK_PERIOD_FROM_HZ(hz)); in clock_set_hz()
197 return clock_set(clk, CLOCK_PERIOD_FROM_NS(ns)); in clock_set_ns()
223 if (clock_set(clk, value)) { in clock_update()
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| /openbmc/linux/kernel/time/ |
| H A D | timekeeping.c | 2066 unsigned int clock_set = 0; in accumulate_nsecs_to_secs() local
2097 clock_set = TK_CLOCK_WAS_SET; in accumulate_nsecs_to_secs()
2100 return clock_set; in accumulate_nsecs_to_secs()
2113 u32 shift, unsigned int *clock_set) in logarithmic_accumulation() argument
2156 unsigned int clock_set = 0; in timekeeping_advance() local
2190 &clock_set); in timekeeping_advance()
2215 timekeeping_update(tk, clock_set); in timekeeping_advance()
2222 return !!clock_set; in timekeeping_advance()
2426 bool clock_set = false; in do_adjtimex() local
2465 clock_set = true; in do_adjtimex()
[all …]
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| H A D | posix-timers.h | 7 int (*clock_set)(const clockid_t which_clock, member
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| H A D | posix-timers.c | 1119 if (!kc || !kc->clock_set) in SYSCALL_DEFINE2()
1129 return kc->clock_set(which_clock, &new_tp); in SYSCALL_DEFINE2()
1278 if (!kc || !kc->clock_set) in SYSCALL_DEFINE2()
1284 return kc->clock_set(which_clock, &ts); in SYSCALL_DEFINE2()
1433 .clock_set = posix_clock_realtime_set,
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| H A D | posix-clock.c | 314 .clock_set = pc_clock_settime,
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| H A D | posix-cpu-timers.c | 1670 .clock_set = posix_cpu_clock_set,
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| /openbmc/qemu/hw/core/ |
| H A D | clock.c | 55 bool clock_set(Clock *clk, uint64_t period) in clock_set() function
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| H A D | trace-events | 28 clock_set(const char *clk, uint64_t old, uint64_t new) "'%s', %"PRIu64"Hz->%"PRIu64"Hz"
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dpll.c | 1177 if (!crtc_state->clock_set && in ilk_crtc_compute_clock()
1251 if (!crtc_state->clock_set && in chv_crtc_compute_clock()
1276 if (!crtc_state->clock_set && in vlv_crtc_compute_clock()
1325 if (!crtc_state->clock_set && in g4x_crtc_compute_clock()
1363 if (!crtc_state->clock_set && in pnv_crtc_compute_clock()
1399 if (!crtc_state->clock_set && in i9xx_crtc_compute_clock()
1439 if (!crtc_state->clock_set && in i8xx_crtc_compute_clock()
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| H A D | intel_display_types.h | 1153 bool clock_set; member
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| H A D | g4x_dp.c | 81 pipe_config->clock_set = true; in g4x_dp_set_clock()
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| H A D | intel_tv.c | 1227 pipe_config->clock_set = true; in intel_tv_compute_config()
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| H A D | vlv_dsi.c | 324 pipe_config->clock_set = true; in intel_dsi_compute_config()
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| H A D | icl_dsi.c | 1650 pipe_config->clock_set = true; in gen11_dsi_compute_config()
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| H A D | intel_sdvo.c | 1300 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
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| /openbmc/qemu/docs/devel/ |
| H A D | clocks.rst | 282 Similarly to ``clock_set()``, ``clock_set_mul_div()`` returns ``true`` if
296 of 0. If this is not the desired behaviour, ``clock_set()``,
435 ``clock_set[_ns|_hz]()`` (with the same arguments) then
518 device state. The functions ``clock_set[_ns|_hz]()`` can be used during the
525 suitable ``needed`` function, and use ``clock_set()`` in a
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| /openbmc/qemu/hw/misc/ |
| H A D | zynq_slcr.c | 285 clock_set(s->uart0_ref_clk, in zynq_slcr_compute_clocks_internal()
287 clock_set(s->uart1_ref_clk, in zynq_slcr_compute_clocks_internal()
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| H A D | bcm2835_cprman.c | 683 clock_set(s->gnd, 0); in cprman_init()
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| H A D | stm32l4x5_rcc.c | 65 clk_changed |= clock_set(mux->out, clock_get(current_source)); in clock_mux_update()
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci.c | 1909 goto clock_set; in sdhci_calc_clk()
1967 clock_set: in sdhci_calc_clk()
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