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Searched refs:clkreg (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/ata/
H A Dpata_ftide010.c147 u8 clkreg; in ftide010_set_dmamode() local
160 clkreg = readb(ftide->base + FTIDE010_CLK_MOD); in ftide010_set_dmamode()
161 clkreg &= ~udma_en_mask; in ftide010_set_dmamode()
162 clkreg &= ~f66m_en_mask; in ftide010_set_dmamode()
169 clkreg |= udma_en_mask; in ftide010_set_dmamode()
171 clkreg |= f66m_en_mask; in ftide010_set_dmamode()
184 clkreg, timreg); in ftide010_set_dmamode()
186 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD); in ftide010_set_dmamode()
194 clkreg |= f66m_en_mask; in ftide010_set_dmamode()
203 clkreg, timreg); in ftide010_set_dmamode()
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/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dclock.c202 uint32_t clk, clkreg; in mxs_set_sspclk() local
207 clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) + in mxs_set_sspclk()
210 clrbits_le32(clkreg, CLKCTRL_SSP_CLKGATE); in mxs_set_sspclk()
211 while (readl(clkreg) & CLKCTRL_SSP_CLKGATE) in mxs_set_sspclk()
227 clrsetbits_le32(clkreg, CLKCTRL_SSP_DIV_MASK, clk); in mxs_set_sspclk()
228 while (readl(clkreg) & CLKCTRL_SSP_BUSY) in mxs_set_sspclk()
246 uint32_t clkreg; in mxs_get_sspclk() local
256 clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) + in mxs_get_sspclk()
259 tmp = readl(clkreg) & CLKCTRL_SSP_DIV_MASK; in mxs_get_sspclk()
/openbmc/linux/drivers/mmc/host/
H A Dmmci.c139 .clkreg = MCI_CLK_ENABLE,
165 .clkreg = MCI_CLK_ENABLE,
199 .clkreg = MCI_CLK_ENABLE,
234 .clkreg = MCI_CLK_ENABLE,
341 .clkreg = MCI_CLK_ENABLE,
438 u32 clk = variant->clkreg; in mmci_set_clkreg()
H A Dmmci.h337 unsigned int clkreg; member
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dbnx2.c7981 u32 clkreg; in bnx2_get_pci_speed() local
7985 clkreg = BNX2_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS); in bnx2_get_pci_speed()
7987 clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET; in bnx2_get_pci_speed()
7988 switch (clkreg) { in bnx2_get_pci_speed()