Searched refs:clk_mux_sdio_pll_p (Results 1 – 1 of 1) sorted by relevance
371 clk_mux_sdio_pll_p[] = { "clk_ppll0", "clk_ppll3", "clk_ppll2", "clk_ppll2", }; variable433 { HI3670_CLK_MUX_SDIO_PLL, "clk_mux_sdio_pll", clk_mux_sdio_pll_p,434 ARRAY_SIZE(clk_mux_sdio_pll_p), CLK_SET_RATE_PARENT,