Searched refs:clk_mux_pll02p (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/drivers/clk/hisilicon/ |
| H A D | clk-hi3660.c | 256 clk_mux_pll02p[] = {"clk_ppll0", "clk_ppll2",}; variable
287 { HI3660_CLK_MUX_MMC_PLL, "clk_mux_mmc_pll", clk_mux_pll02p,
288 ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0xb4, 0, 1,
320 { HI3660_CLK_MUX_A53HPM, "clk_mux_a53hpm", clk_mux_pll02p,
321 ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0xd4, 9, 1,
323 { HI3660_CLK_MUX_320M, "clk_mux_320m", clk_mux_pll02p,
324 ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0x100, 0, 1,
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