Searched refs:clk_mux_ldi1_p (Results 1 – 1 of 1) sorted by relevance
769 clk_mux_ldi1_p[] = { "clk_invalid", "clk_gate_ppll7_media", variable792 { HI3670_CLK_MUX_LDI1, "clk_mux_ldi1", clk_mux_ldi1_p,793 ARRAY_SIZE(clk_mux_ldi1_p), CLK_SET_RATE_PARENT,