Searched refs:clk_cfg0 (Results 1 – 1 of 1) sorted by relevance
450 u16 clk_cfg0; in dib7000p_reset_pll() local461 clk_cfg0 = (1 << 15) | ((bw->pll_ratio & 0x3f) << 9) | in dib7000p_reset_pll()464 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()468 clk_cfg0 = (bw->pll_bypass << 15) | (clk_cfg0 & 0x7fff); in dib7000p_reset_pll()469 dib7000p_write_word(state, 900, clk_cfg0); in dib7000p_reset_pll()