Home
last modified time | relevance | path

Searched refs:cfg_val (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/drivers/gpio/
H A Dmvmfp.c32 u32 cfg_val, val; in mfp_config() local
35 cfg_val = *mfp_cfgs++; in mfp_config()
37 if (cfg_val == MFP_EOC) in mfp_config()
41 + MFP_REG_GET_OFFSET(cfg_val)); in mfp_config()
45 if (cfg_val & MFP_VALUE_MASK) in mfp_config()
46 val |= cfg_val & MFP_VALUE_MASK; in mfp_config()
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Dboot_mode.h45 unsigned cfg_val; member
49 void boot_mode_apply(unsigned cfg_val);
/openbmc/u-boot/arch/arm/mach-imx/
H A Dinit.c104 void boot_mode_apply(unsigned cfg_val) in boot_mode_apply() argument
108 writel(cfg_val, &psrc->gpr9); in boot_mode_apply()
110 if (cfg_val) in boot_mode_apply()
H A Dcmd_bmode.c74 boot_mode_apply(p->cfg_val); in do_boot_mode()
75 if (reset_requested && p->cfg_val) in do_boot_mode()
/openbmc/u-boot/arch/arm/mach-imx/mx5/
H A Dsoc.c88 void boot_mode_apply(unsigned cfg_val) in boot_mode_apply() argument
90 writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr); in boot_mode_apply()
/openbmc/qemu/target/riscv/
H A Dpmp.c490 uint8_t cfg_val; in pmpcfg_csr_write() local
497 cfg_val = (val >> 8 * i) & 0xff; in pmpcfg_csr_write()
498 modified |= pmp_write_cfg(env, (reg_index * 4) + i, cfg_val); in pmpcfg_csr_write()
515 target_ulong cfg_val = 0; in pmpcfg_csr_read() local
521 cfg_val |= (val << (i * 8)); in pmpcfg_csr_read()
523 trace_pmpcfg_csr_read(env->mhartid, reg_index, cfg_val); in pmpcfg_csr_read()
525 return cfg_val; in pmpcfg_csr_read()
H A Dcsr.c1249 uint64_t cfg_val = 0; in riscv_pmu_ctr_get_fixed_counters_val() local
1252 cfg_val = upper_half ? ((uint64_t)env->mcyclecfgh << 32) : in riscv_pmu_ctr_get_fixed_counters_val()
1255 cfg_val = upper_half ? ((uint64_t)env->minstretcfgh << 32) : in riscv_pmu_ctr_get_fixed_counters_val()
1258 cfg_val = upper_half ? in riscv_pmu_ctr_get_fixed_counters_val()
1261 cfg_val &= MHPMEVENT_FILTER_MASK; in riscv_pmu_ctr_get_fixed_counters_val()
1264 if (!cfg_val) { in riscv_pmu_ctr_get_fixed_counters_val()
1277 if (!(cfg_val & MCYCLECFG_BIT_MINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
1281 if (!(cfg_val & MCYCLECFG_BIT_SINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
1285 if (!(cfg_val & MCYCLECFG_BIT_UINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
1289 if (!(cfg_val & MCYCLECFG_BIT_VSINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
[all …]
/openbmc/u-boot/drivers/spi/
H A Dfsl_dspi.c146 static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val) in fsl_dspi_init_mcr() argument
151 dspi_write32(priv->flags, &priv->regs->mcr, cfg_val); in fsl_dspi_init_mcr()
156 priv->mcr_val = cfg_val; in fsl_dspi_init_mcr()
/openbmc/qemu/hw/intc/
H A Dpnv_xive.c76 uint64_t cfg_val = xive->regs[PC_TCTXT_CFG >> 3]; in pnv_xive_block_id() local
78 if (cfg_val & PC_TCTXT_CHIPID_OVERRIDE) { in pnv_xive_block_id()
79 blk = GETFIELD(PC_TCTXT_CHIPID, cfg_val); in pnv_xive_block_id()
H A Dpnv_xive2.c94 uint64_t cfg_val = xive->cq_regs[CQ_XIVE_CFG >> 3]; in pnv_xive2_block_id() local
96 if (cfg_val & CQ_XIVE_CFG_HYP_HARD_BLKID_OVERRIDE) { in pnv_xive2_block_id()
97 blk = GETFIELD(CQ_XIVE_CFG_HYP_HARD_BLOCK_ID, cfg_val); in pnv_xive2_block_id()