Searched refs:cfg_reg (Results 1 – 5 of 5) sorted by relevance
43 u32 *cfg_reg, *ctl_reg; in mx3_setup_sdram_bank() local49 cfg_reg = &esdc->esdcfg0; in mx3_setup_sdram_bank()53 cfg_reg = &esdc->esdcfg1; in mx3_setup_sdram_bank()79 writel(ddr2_config, cfg_reg); in mx3_setup_sdram_bank()
58 if (env->pmp_state.pmp[pmp_index].cfg_reg & PMP_LOCK) { in pmp_is_locked() 139 return env->pmp_state.pmp[pmp_index].cfg_reg; in pmp_write_cfg() 155 if (env->pmp_state.pmp[pmp_index].cfg_reg == val) { in pmp_write_cfg() 176 env->pmp_state.pmp[pmp_index].cfg_reg = val; in pmp_unlock_entries() 194 env->pmp_state.pmp[i].cfg_reg &= ~(PMP_LOCK | PMP_AMATCH);217 uint8_t this_cfg = env->pmp_state.pmp[pmp_index].cfg_reg; in pmp_update_rule_addr() 275 pmp_get_a_field(env->pmp_state.pmp[i].cfg_reg); in pmp_hart_has_privs_default() 406 pmp_get_a_field(env->pmp_state.pmp[i].cfg_reg); in pmp_hart_has_privs() 420 *allowed_privs &= env->pmp_state.pmp[i].cfg_reg; in pmp_hart_has_privs() 427 pmp_get_smepmp_operation(env->pmp_state.pmp[i].cfg_reg); in pmp_hart_has_privs() [all...]
54 uint8_t cfg_reg; member
55 VMSTATE_UINT8(cfg_reg, pmp_entry_t),
46 u32 cfg_reg; member208 mxcs->cfg_reg = reg_config; in spi_cfg_mxc()236 reg_write(®s->cfg, mxcs->cfg_reg); in spi_xchg_single()