Home
last modified time | relevance | path

Searched refs:cfgPSWUSCFG0_0_PCIE_VC1_RESOURCE_CNTL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_offset.h778 #define cfgPSWUSCFG0_0_PCIE_VC1_RESOURCE_CNTL … macro
H A Dnbio_4_3_0_offset.h2624 #define cfgPSWUSCFG0_0_PCIE_VC1_RESOURCE_CNTL … macro