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Searched refs:bit_id (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_centralization.c56 u32 if_id, pattern_id, bit_id; in ddr3_tip_centralization() local
169 for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS; in ddr3_tip_centralization()
170 bit_id++) { in ddr3_tip_centralization()
172 cur_start_win[bit_id] = in ddr3_tip_centralization()
175 [bit_id], in ddr3_tip_centralization()
177 cur_end_win[bit_id] = in ddr3_tip_centralization()
180 [bit_id], in ddr3_tip_centralization()
183 current_window[bit_id] = in ddr3_tip_centralization()
184 cur_end_win[bit_id] - in ddr3_tip_centralization()
185 cur_start_win[bit_id] + 1; in ddr3_tip_centralization()
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H A Dddr3_training_ip_engine.c1109 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1173 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1174 h2l_adll_value[sybphy_id][bit_id] = 64; in ddr3_tip_ip_training_wrapper()
1175 l2h_adll_value[sybphy_id][bit_id] = 0; in ddr3_tip_ip_training_wrapper()
1180 ACCESS_TYPE_UNICAST, sybphy_id, bit_id, in ddr3_tip_ip_training_wrapper()
1194 if_id, sybphy_id, bit_id, result[HWS_LOW2HIGH][0], e1, in ddr3_tip_ip_training_wrapper()
1206 bit_state[sybphy_id * BUS_WIDTH_IN_BITS + bit_id] = in ddr3_tip_ip_training_wrapper()
1210 bit_bit_mask[sybphy_id] |= (1 << bit_id); in ddr3_tip_ip_training_wrapper()
1215 if_id, sybphy_id, bit_id)); in ddr3_tip_ip_training_wrapper()
1219 bit_state[sybphy_id * BUS_WIDTH_IN_BITS + bit_id] = in ddr3_tip_ip_training_wrapper()
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H A Dddr3_training.c2598 u32 bit_start = 0, bit_end = 0, bit_id; in ddr3_tip_is_pup_lock() local
2608 for (bit_id = bit_start; bit_id <= bit_end; bit_id++) { in ddr3_tip_is_pup_lock()
2609 if (GET_LOCK_RESULT(pup_buf[bit_id]) == 0) in ddr3_tip_is_pup_lock()