Searched refs:baud_rate_val (Results 1 – 7 of 7) sorted by relevance
280 u8 baud_rate_val = 0; in zynq_spi_set_speed() local289 baud_rate_val = 0x2; in zynq_spi_set_speed()291 while ((baud_rate_val < ZYNQ_SPI_CR_BAUD_MAX) && in zynq_spi_set_speed()293 (2 << baud_rate_val)) > speed)) in zynq_spi_set_speed()294 baud_rate_val++; in zynq_spi_set_speed()295 plat->speed_hz = speed / (2 << baud_rate_val); in zynq_spi_set_speed()298 confr |= (baud_rate_val << ZYNQ_SPI_CR_BAUD_SHIFT); in zynq_spi_set_speed()
298 u8 baud_rate_val = 0; in zynqmp_qspi_set_speed() local308 baud_rate_val = GQSPI_DFLT_BAUD_RATE_VAL; in zynqmp_qspi_set_speed()310 while ((baud_rate_val < 8) && in zynqmp_qspi_set_speed()312 (2 << baud_rate_val)) > speed)) in zynqmp_qspi_set_speed()313 baud_rate_val++; in zynqmp_qspi_set_speed()315 if (baud_rate_val > GQSPI_MAX_BAUD_RATE_VAL) in zynqmp_qspi_set_speed()316 baud_rate_val = GQSPI_DFLT_BAUD_RATE_VAL; in zynqmp_qspi_set_speed()318 plat->speed_hz = plat->frequency / (2 << baud_rate_val); in zynqmp_qspi_set_speed()321 confr |= (baud_rate_val << 3); in zynqmp_qspi_set_speed()324 zynqmp_qspi_set_tapdelay(bus, baud_rate_val); in zynqmp_qspi_set_speed()
555 u8 baud_rate_val = 0; in zynq_qspi_set_speed() local564 baud_rate_val = 0x2; in zynq_qspi_set_speed()566 while ((baud_rate_val < ZYNQ_QSPI_CR_BAUD_MAX) && in zynq_qspi_set_speed()568 (2 << baud_rate_val)) > speed)) in zynq_qspi_set_speed()569 baud_rate_val++; in zynq_qspi_set_speed()571 plat->speed_hz = speed / (2 << baud_rate_val); in zynq_qspi_set_speed()574 confr |= (baud_rate_val << ZYNQ_QSPI_CR_BAUD_SHIFT); in zynq_qspi_set_speed()
356 u32 config_reg, baud_rate_val = 0; in zynqmp_qspi_init_hw() local404 while ((baud_rate_val < GQSPI_BAUD_DIV_MAX) && in zynqmp_qspi_init_hw()406 (GQSPI_BAUD_DIV_SHIFT << baud_rate_val)) > xqspi->speed_hz) in zynqmp_qspi_init_hw()407 baud_rate_val++; in zynqmp_qspi_init_hw()410 config_reg |= (baud_rate_val << GQSPI_CFG_BAUD_RATE_DIV_SHIFT); in zynqmp_qspi_init_hw()415 zynqmp_qspi_set_tapdelay(xqspi, baud_rate_val); in zynqmp_qspi_init_hw()559 u32 config_reg, req_speed_hz, baud_rate_val = 0; in zynqmp_qspi_config_op() local570 while ((baud_rate_val < GQSPI_BAUD_DIV_MAX) && in zynqmp_qspi_config_op()572 (GQSPI_BAUD_DIV_SHIFT << baud_rate_val)) > in zynqmp_qspi_config_op()574 baud_rate_val++; in zynqmp_qspi_config_op()[all …]
257 u32 ctrl_reg, baud_rate_val; in cdns_spi_config_clock_freq() local267 baud_rate_val = CDNS_SPI_BAUD_DIV_MIN; in cdns_spi_config_clock_freq()268 while ((baud_rate_val < CDNS_SPI_BAUD_DIV_MAX) && in cdns_spi_config_clock_freq()269 (frequency / (2 << baud_rate_val)) > transfer->speed_hz) in cdns_spi_config_clock_freq()270 baud_rate_val++; in cdns_spi_config_clock_freq()273 ctrl_reg |= baud_rate_val << CDNS_SPI_BAUD_DIV_SHIFT; in cdns_spi_config_clock_freq()275 xspi->speed_hz = frequency / (2 << baud_rate_val); in cdns_spi_config_clock_freq()
271 u32 control, baud_rate_val = 0; in mchp_coreqspi_setup_clock() local277 baud_rate_val = DIV_ROUND_UP(clk_hz, 2 * spi->max_speed_hz); in mchp_coreqspi_setup_clock()278 if (baud_rate_val > MAX_DIVIDER || baud_rate_val < MIN_DIVIDER) { in mchp_coreqspi_setup_clock()287 control |= baud_rate_val << CONTROL_CLKRATE_SHIFT; in mchp_coreqspi_setup_clock()
336 u32 config_reg, baud_rate_val = 0; in zynq_qspi_config_op() local347 while ((baud_rate_val < ZYNQ_QSPI_CONFIG_BAUD_DIV_MAX) && in zynq_qspi_config_op()348 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op()350 baud_rate_val++; in zynq_qspi_config_op()363 config_reg |= (baud_rate_val << ZYNQ_QSPI_CONFIG_BAUD_DIV_SHIFT); in zynq_qspi_config_op()