/openbmc/linux/drivers/clk/ux500/ |
H A D | u8500_of_clk.c | 131 u32 bases[CLKRST_MAX]; in u8500_clk_init() local 144 for (i = 0; i < ARRAY_SIZE(bases); i++) { in u8500_clk_init() 151 bases[i] = r.start; in u8500_clk_init() 489 bases[CLKRST1_INDEX], BIT(0), CLK_SET_RATE_GATE); in u8500_clk_init() 493 bases[CLKRST1_INDEX], BIT(1), CLK_SET_RATE_GATE); in u8500_clk_init() 497 bases[CLKRST1_INDEX], BIT(2), CLK_SET_RATE_GATE); in u8500_clk_init() 501 bases[CLKRST1_INDEX], BIT(3), CLK_SET_RATE_GATE); in u8500_clk_init() 505 bases[CLKRST1_INDEX], BIT(4), CLK_SET_RATE_GATE); in u8500_clk_init() 509 bases[CLKRST1_INDEX], BIT(5), CLK_SET_RATE_GATE); in u8500_clk_init() 551 bases[CLKRST2_INDEX], BIT(6), in u8500_clk_init() [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/dispnv50/ |
H A D | base.c | 33 } bases[] = { in nv50_base_new() local 46 cid = nvif_mclass(&disp->disp->object, bases); in nv50_base_new() 52 return bases[cid].new(drm, head, bases[cid].oclass, pwndw); in nv50_base_new()
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/openbmc/openbmc/poky/meta/recipes-support/libpcre/libpcre/ |
H A D | Makefile | 57 bases='$(TEST_LOGS)'; \ 58 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \ 59 bases=`echo $$bases` 75 redo_bases=`for i in $$bases; do \ 89 results=`for b in $$bases; do echo $$b.trs; done`; \ 139 for b in $$bases; do echo $$b; done; \ 162 log_list=`for i in $$bases; do echo $$i.log; done`; \
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/openbmc/linux/include/linux/ |
H A D | posix-timers.h | 133 struct posix_cputimer_base bases[CPUCLOCK_MAX]; member 153 pct->bases[0].nextevt = U64_MAX; in posix_cputimers_init() 154 pct->bases[1].nextevt = U64_MAX; in posix_cputimers_init() 155 pct->bases[2].nextevt = U64_MAX; in posix_cputimers_init() 163 pct->bases[CPUCLOCK_SCHED].nextevt = runtime; in posix_cputimers_rt_watchdog() 179 .bases = INIT_CPU_TIMERBASES(s.posix_cputimers.bases), \
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/openbmc/linux/drivers/gpu/host1x/ |
H A D | syncpt.c | 26 struct host1x_syncpt_base *bases = host->bases; in host1x_syncpt_base_request() local 30 if (!bases[i].requested) in host1x_syncpt_base_request() 36 bases[i].requested = true; in host1x_syncpt_base_request() 37 return &bases[i]; in host1x_syncpt_base_request() 282 struct host1x_syncpt_base *bases; in host1x_syncpt_init() local 291 bases = devm_kcalloc(host->dev, host->info->nb_bases, sizeof(*bases), in host1x_syncpt_init() 293 if (!bases) in host1x_syncpt_init() 302 bases[i].id = i; in host1x_syncpt_init() 306 host->bases = bases; in host1x_syncpt_init()
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/openbmc/openbmc/poky/meta/lib/oe/ |
H A D | classutils.py | 9 def __init__(cls, name, bases, attrs): argument 11 type.__init__(cls, name, bases, attrs) 27 def __init__(cls, name, bases, attrs): argument 28 super(ClassRegistry, cls).__init__(name, bases, attrs)
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H A D | spdx.py | 145 def __new__(mcls, name, bases, attrs): argument 154 return super().__new__(mcls, name, bases, attrs)
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H A D | terminal.py | 25 def __init__(cls, name, bases, attrs): argument 26 super(Registry, cls).__init__(name.lower(), bases, attrs)
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/openbmc/linux/drivers/iommu/ |
H A D | rockchip-iommu.c | 107 void __iomem **bases; member 429 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall() 450 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall() 471 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging() 492 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_paging() 535 void __iomem *base = iommu->bases[index]; in log_iova() 941 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, in rk_iommu_enable() 1235 iommu->bases = devm_kcalloc(dev, num_res, sizeof(*iommu->bases), in rk_iommu_probe() 1237 if (!iommu->bases) in rk_iommu_probe() 1245 if (IS_ERR(iommu->bases[i])) in rk_iommu_probe() [all …]
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/openbmc/openbmc/poky/bitbake/lib/bb/ |
H A D | namedtuple_with_abc.py | 49 def __new__(mcls, name, bases, namespace): argument 51 for base in bases: 57 bases = (basetuple,) + bases 61 return ABCMeta.__new__(mcls, name, bases, namespace)
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/openbmc/linux/drivers/iommu/arm/arm-smmu/ |
H A D | arm-smmu-nvidia.c | 36 void __iomem *bases[MAX_SMMU_INSTANCES]; member 52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page() 324 nvidia_smmu->bases[0] = smmu->base; in nvidia_smmu_impl_init() 332 nvidia_smmu->bases[i] = devm_ioremap_resource(dev, res); in nvidia_smmu_impl_init() 333 if (IS_ERR(nvidia_smmu->bases[i])) in nvidia_smmu_impl_init() 334 return ERR_CAST(nvidia_smmu->bases[i]); in nvidia_smmu_impl_init()
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/openbmc/linux/kernel/time/ |
H A D | posix-cpu-timers.c | 154 return !(~pct->bases[CPUCLOCK_PROF].nextevt | in expiry_cache_is_inactive() 155 ~pct->bases[CPUCLOCK_VIRT].nextevt | in expiry_cache_is_inactive() 156 ~pct->bases[CPUCLOCK_SCHED].nextevt); in expiry_cache_is_inactive() 422 return tsk->posix_cputimers.bases + clkidx; in timer_base() 424 return tsk->signal->posix_cputimers.bases + clkidx; in timer_base() 861 struct posix_cputimer_base *base = pct->bases; in collect_posix_cputimers() 1007 &pct->bases[CPUCLOCK_PROF].nextevt, in check_process_timers() 1010 &pct->bases[CPUCLOCK_VIRT].nextevt, in check_process_timers() 1033 if (softns < pct->bases[CPUCLOCK_PROF].nextevt) in check_process_timers() 1034 pct->bases[CPUCLOCK_PROF].nextevt = softns; in check_process_timers() [all …]
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H A D | tick-internal.h | 176 void clock_was_set(unsigned int bases);
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/openbmc/linux/arch/x86/boot/ |
H A D | early_serial_console.c | 77 static const int bases[] = { 0x3f8, 0x2f8 }; in parse_earlyprintk() local 86 port = bases[idx]; in parse_earlyprintk()
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/openbmc/openbmc/poky/scripts/lib/wic/ |
H A D | pluginbase.py | 66 def __new__(cls, name, bases, attrs): argument 67 class_type = type.__new__(cls, name, bases, attrs)
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/openbmc/openbmc/poky/bitbake/lib/toaster/orm/migrations/ |
H A D | 0003_customimagepackage.py | 22 bases=('orm.package',),
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H A D | 0002_customimagerecipe.py | 22 bases=('orm.recipe',),
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/openbmc/linux/drivers/gpu/drm/exynos/ |
H A D | exynos_drm_scaler.c | 155 static unsigned int bases[] = { in scaler_set_src_base() local 163 scaler_write(src_buf->dma_addr[i], bases[i]); in scaler_set_src_base() 218 static unsigned int bases[] = { in scaler_set_dst_base() local 226 scaler_write(dst_buf->dma_addr[i], bases[i]); in scaler_set_dst_base()
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/openbmc/linux/arch/x86/kernel/ |
H A D | early_printk.c | 162 static const int __initconst bases[] = { 0x3f8, 0x2f8 }; in early_serial_init() local 169 early_serial_base = bases[port]; in early_serial_init()
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/openbmc/qemu/hw/xen/ |
H A D | xen_pt.c | 274 (s->bases[index].bar_flag == XEN_PT_BAR_FLAG_UNUSED)) { in xen_pt_pci_write_config() 470 s->bases[i].access.u = r->base_addr; in xen_pt_register_regions() 508 s->bases[PCI_ROM_SLOT].access.maddr = d->rom.base_addr; in xen_pt_register_regions() 628 uint32_t machine_port = s->bases[bar].access.pio_base; in xen_pt_region_update() 639 pcibus_t machine_addr = s->bases[bar].access.maddr in xen_pt_region_update()
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H A D | xen_pt_config_init.c | 373 region = &s->bases[index - 1]; in xen_pt_bar_reg_parse() 421 s->bases[index].bar_flag = xen_pt_bar_reg_parse(s, index); in xen_pt_bar_reg_init() 422 if (s->bases[index].bar_flag == XEN_PT_BAR_FLAG_UNUSED) { in xen_pt_bar_reg_init() 448 switch (s->bases[index].bar_flag) { in xen_pt_bar_reg_read() 490 base = &s->bases[index]; in xen_pt_bar_reg_write() 494 switch (s->bases[index].bar_flag) { in xen_pt_bar_reg_write() 523 switch (s->bases[index].bar_flag) { in xen_pt_bar_reg_write() 556 base = &s->bases[PCI_ROM_SLOT]; in xen_pt_exp_rom_bar_reg_write()
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | cpufreq-mediatek-hw.yaml | 25 Addresses and sizes for the memory of the HW bases in
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/ltrace/ltrace/ |
H A D | 0001-mips-Use-hardcodes-values-for-ABI-syscall-bases.patch | 4 Subject: [PATCH] mips: Use hardcodes values for ABI syscall bases
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/ltrace/ |
H A D | ltrace_git.bb | 32 file://0001-mips-Use-hardcodes-values-for-ABI-syscall-bases.patch \
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | mediatek,sysirq.txt | 32 mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
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