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Searched refs:baseaddr (Results 1 – 25 of 72) sorted by relevance

123

/openbmc/qemu/tests/qtest/
H A Dqtest_aspeed.c18 static void aspeed_i2c_startup(QTestState *s, uint32_t baseaddr, in aspeed_i2c_startup() argument
26 qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, 0); in aspeed_i2c_startup()
28 qtest_writel(s, baseaddr + A_I2CC_FUN_CTRL, v); in aspeed_i2c_startup()
34 qtest_writel(s, baseaddr + A_I2CD_CMD, in aspeed_i2c_startup()
38 qtest_writel(s, baseaddr + A_I2CD_BYTE_BUF, reg); in aspeed_i2c_startup()
39 qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD); in aspeed_i2c_startup()
50 aspeed_i2c_startup(s, baseaddr, slave_addr, reg); in aspeed_i2c_read_n()
54 v = qtest_readl(s, baseaddr + A_I2CD_BYTE_BUF) >> 8; in aspeed_i2c_read_n()
58 qtest_writel(s, baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD); in aspeed_i2c_read_n()
87 aspeed_i2c_startup(s, baseaddr, slave_addr, reg); in aspeed_i2c_write_n()
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H A Dqtest_aspeed.h29 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
31 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
33 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg);
34 void aspeed_i2c_writeb(QTestState *s, uint32_t baseaddr, uint8_t slave_addr,
36 void aspeed_i2c_writew(QTestState *s, uint32_t baseaddr, uint8_t slave_addr,
38 void aspeed_i2c_writel(QTestState *s, uint32_t baseaddr, uint8_t slave_addr,
/openbmc/linux/drivers/edac/
H A Dzynqmp_edac.c111 void __iomem *baseaddr; member
194 regval = readl(priv->baseaddr + OCM_ISR_OFST); in intr_handler()
240 writel(ficount, priv->baseaddr + OCM_FIC_OFST); in write_fault_count()
269 writel(0, priv->baseaddr + OCM_FID1_OFST); in inject_ce_write()
272 priv->baseaddr + OCM_FID1_OFST); in inject_ce_write()
273 writel(0, priv->baseaddr + OCM_FID0_OFST); in inject_ce_write()
370 void __iomem *baseaddr; in edac_probe() local
375 if (IS_ERR(baseaddr)) in edac_probe()
376 return PTR_ERR(baseaddr); in edac_probe()
378 if (!get_eccstate(baseaddr)) { in edac_probe()
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H A Dsynopsys_edac.c315 void __iomem *baseaddr; member
359 base = priv->baseaddr; in zynq_get_error_info()
414 base = priv->baseaddr; in zynqmp_get_error_info()
521 priv->baseaddr + ECC_CLR_OFST); in enable_intr()
1053 writel(0, priv->baseaddr + DDRC_SWCTL); in inject_data_poison_store()
1058 writel(1, priv->baseaddr + DDRC_SWCTL); in inject_data_poison_store()
1326 void __iomem *baseaddr; in mc_probe() local
1332 if (IS_ERR(baseaddr)) in mc_probe()
1333 return PTR_ERR(baseaddr); in mc_probe()
1339 if (!p_data->get_ecc_state(baseaddr)) { in mc_probe()
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/openbmc/linux/arch/arm/mach-versatile/
H A Dspc.c95 void __iomem *baseaddr; member
129 reg = readl_relaxed(info->baseaddr + WAKE_INT_MASK); in ve_spc_global_wakeup_irq()
136 writel_relaxed(reg, info->baseaddr + WAKE_INT_MASK); in ve_spc_global_wakeup_irq()
181 void __iomem *baseaddr; in ve_spc_set_resume_addr() local
187 baseaddr = info->baseaddr + A15_BX_ADDR0 + (cpu << 2); in ve_spc_set_resume_addr()
189 baseaddr = info->baseaddr + A7_BX_ADDR0 + (cpu << 2); in ve_spc_set_resume_addr()
191 writel_relaxed(addr, baseaddr); in ve_spc_set_resume_addr()
338 writel(perf, info->baseaddr + perf_cfg_reg); in ve_spc_set_performance()
362 *data = readl(info->baseaddr + SYSCFG_RDATA); in ve_spc_read_sys_cfg()
449 info->baseaddr = baseaddr; in ve_spc_init()
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/openbmc/linux/drivers/watchdog/
H A Dpm8916_wdt.c42 u32 baseaddr; member
50 wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, in pm8916_wdt_start()
59 wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, in pm8916_wdt_stop()
67 return regmap_write(wdt->regmap, wdt->baseaddr + PON_PMIC_WD_RESET_PET, in pm8916_wdt_ping()
77 wdt->baseaddr + PON_PMIC_WD_RESET_S1_TIMER, in pm8916_wdt_configure_timers()
83 wdt->baseaddr + PON_PMIC_WD_RESET_S2_TIMER, in pm8916_wdt_configure_timers()
108 err = regmap_read(wdt->regmap, wdt->baseaddr + PON_INT_RT_STS, &sts); in pm8916_wdt_isr()
167 err = device_property_read_u32(parent, "reg", &wdt->baseaddr); in pm8916_wdt_probe()
188 err = regmap_bulk_read(wdt->regmap, wdt->baseaddr + PON_POFF_REASON1, in pm8916_wdt_probe()
203 err = regmap_read(wdt->regmap, wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, in pm8916_wdt_probe()
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/openbmc/linux/include/linux/
H A Ddio.h124 #define DIO_ID(baseaddr) in_8((baseaddr) + DIO_IDOFF) argument
125 #define DIO_SECID(baseaddr) in_8((baseaddr) + DIO_SECIDOFF) argument
128 #define DIO_IPL(baseaddr) (((in_8((baseaddr) + DIO_IPLOFF) >> 4) & 0x03) + 3) argument
133 #define DIOII_SIZE(baseaddr) ((in_8((baseaddr) + DIOII_SIZEOFF) + 1) * 0x100000) argument
/openbmc/linux/arch/mips/include/asm/txx9/
H A Dgeneric.h50 void txx9_sio_init(unsigned long baseaddr, int irq,
54 void txx9_sio_putchar_init(unsigned long baseaddr);
56 static inline void txx9_sio_putchar_init(unsigned long baseaddr) in txx9_sio_putchar_init() argument
83 void txx9_iocled_init(unsigned long baseaddr,
92 void __init txx9_aclc_init(unsigned long baseaddr, int irq,
/openbmc/qemu/hw/arm/
H A Dsmmu-common.c216 dma_addr_t addr = baseaddr + index * sizeof(*pte); in get_pte()
226 trace_smmu_get_pte(baseaddr, index, addr, *pte); in get_pte()
306 dma_addr_t baseaddr, indexmask; in smmu_ptw_64_s1() local
321 baseaddr = extract64(tt->ttb, 0, 48); in smmu_ptw_64_s1()
322 baseaddr &= ~indexmask; in smmu_ptw_64_s1()
332 if (get_pte(baseaddr, offset, &pte, info)) { in smmu_ptw_64_s1()
336 baseaddr, offset, pte); in smmu_ptw_64_s1()
363 trace_smmu_ptw_block_pte(stage, level, baseaddr, in smmu_ptw_64_s1()
422 baseaddr &= ~indexmask; in smmu_ptw_64_s2()
441 if (get_pte(baseaddr, offset, &pte, info)) { in smmu_ptw_64_s2()
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H A Dtrace-events8 …t subpage_size, uint64_t baseaddr, uint32_t offset, uint64_t pte) "stage=%d level=%d iova=0x%"PRIx…
9 smmu_ptw_invalid_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint32_t offset, ui…
10 smmu_ptw_page_pte(int stage, int level, uint64_t iova, uint64_t baseaddr, uint64_t pteaddr, uint64…
11 smmu_ptw_block_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_…
12 smmu_get_pte(uint64_t baseaddr, int index, uint64_t pteaddr, uint64_t pte) "baseaddr=0x%"PRIx64" in…
/openbmc/linux/drivers/scsi/megaraid/
H A Dmegaraid_mbox.h192 void __iomem * baseaddr; member
227 #define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20)
228 #define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C)
229 #define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20)
230 #define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C)
/openbmc/linux/drivers/input/misc/
H A Dpm8941-pwrkey.c70 u32 baseaddr; member
102 pwrkey->baseaddr + enable_reg, in pm8941_reboot_notify()
131 pwrkey->baseaddr + PON_PS_HOLD_RST_CTL, in pm8941_reboot_notify()
139 pwrkey->baseaddr + enable_reg, in pm8941_reboot_notify()
163 err = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_RT_STS, &sts); in pm8941_pwrkey_irq()
203 addr = pwrkey->baseaddr + PON_DBC_CTL; in pm8941_pwrkey_sw_debounce_init()
294 pwrkey->baseaddr = be32_to_cpup(addr); in pm8941_pwrkey_probe()
307 error = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_REV2, in pm8941_pwrkey_probe()
314 error = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_SUBTYPE, in pm8941_pwrkey_probe()
353 pwrkey->baseaddr + PON_DBC_CTL, in pm8941_pwrkey_probe()
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/openbmc/linux/arch/mips/kernel/
H A Dcevt-txx9.c55 void __init txx9_clocksource_init(unsigned long baseaddr, in txx9_clocksource_init() argument
62 tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); in txx9_clocksource_init()
177 void __init txx9_clockevent_init(unsigned long baseaddr, int irq, in txx9_clockevent_init() argument
183 tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); in txx9_clockevent_init()
202 baseaddr, irq); in txx9_clockevent_init()
205 void __init txx9_tmr_init(unsigned long baseaddr) in txx9_tmr_init() argument
209 tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); in txx9_tmr_init()
H A Dgpio_txx9.c77 int __init txx9_gpio_init(unsigned long baseaddr, in txx9_gpio_init() argument
80 txx9_pioptr = ioremap(baseaddr, sizeof(struct txx9_pio_reg)); in txx9_gpio_init()
/openbmc/qemu/hw/smbios/
H A Dsmbios_type_38.c30 uint64_t baseaddr = info->base_address; in smbios_build_one_type_38() local
45 baseaddr |= 1; in smbios_build_one_type_38()
51 baseaddr <<= 1; in smbios_build_one_type_38()
55 t->base_address = cpu_to_le64(baseaddr); in smbios_build_one_type_38()
/openbmc/linux/arch/mips/include/asm/
H A Dtxx9tmr.h55 void txx9_clocksource_init(unsigned long baseaddr,
57 void txx9_clockevent_init(unsigned long baseaddr, int irq,
59 void txx9_tmr_init(unsigned long baseaddr);
/openbmc/linux/drivers/firmware/google/
H A Dvpd.c43 char *baseaddr; member
164 return memory_read_from_buffer(buf, count, &pos, sec->baseaddr, in vpd_section_read()
175 ret = vpd_decode_string(sec->bin_attr.size, sec->baseaddr, in vpd_section_create_attribs()
187 sec->baseaddr = memremap(physaddr, size, MEMREMAP_WB); in vpd_section_init()
188 if (!sec->baseaddr) in vpd_section_init()
229 memunmap(sec->baseaddr); in vpd_section_init()
240 memunmap(sec->baseaddr); in vpd_section_destroy()
/openbmc/linux/arch/mips/txx9/generic/
H A Dsetup.c380 req.membase = ioremap(baseaddr, 0x24); in txx9_sio_init()
381 req.mapbase = baseaddr; in txx9_sio_init()
420 early_txx9_sio_port = ioremap(baseaddr, 0x24); in txx9_sio_putchar_init()
567 void __init txx9_ndfmc_init(unsigned long baseaddr, in txx9_ndfmc_init() argument
572 .start = baseaddr, in txx9_ndfmc_init()
573 .end = baseaddr + 0x1000 - 1, in txx9_ndfmc_init()
633 void __init txx9_iocled_init(unsigned long baseaddr, in txx9_iocled_init() argument
652 iocled->mmioaddr = ioremap(baseaddr, 1); in txx9_iocled_init()
697 void __init txx9_iocled_init(unsigned long baseaddr, in txx9_iocled_init() argument
710 .start = baseaddr, in txx9_dmac_init()
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/openbmc/linux/drivers/power/reset/
H A Dqcom-pon.c25 u32 baseaddr; member
38 pon->baseaddr + PON_SOFT_RB_SPARE, in pm8916_reboot_mode_write()
66 &pon->baseaddr); in pm8916_pon_probe()
/openbmc/qemu/hw/mem/
H A Dsparse-mem.c29 uint64_t baseaddr; member
101 DEFINE_PROP_UINT64("baseaddr", SparseMemState, baseaddr, 0x0),
132 assert(s->baseaddr + s->length > s->baseaddr); in sparse_mem_realize()
/openbmc/linux/sound/soc/bcm/
H A Dcygnus-ssp.h28 unsigned baseaddr; member
38 .baseaddr = SRC_RBUF_ ##num## _BASEADDR_OFFSET, \
48 .baseaddr = DST_RBUF_ ##num## _BASEADDR_OFFSET, \
/openbmc/linux/drivers/ssb/
H A Dscan.c224 unsigned long baseaddr) in ssb_ioremap() argument
233 mmio = ioremap(baseaddr, SSB_CORE_SIZE); in ssb_ioremap()
244 mmio = (void __iomem *)baseaddr; in ssb_ioremap()
272 unsigned long baseaddr) in ssb_bus_scan() argument
281 mmio = ssb_ioremap(bus, baseaddr); in ssb_bus_scan()
337 mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices); in ssb_bus_scan()
/openbmc/linux/drivers/rtc/
H A Drtc-m48t35.c51 unsigned long baseaddr; member
167 priv->baseaddr = res->start; in m48t35_probe()
168 priv->reg = devm_ioremap(&pdev->dev, priv->baseaddr, priv->size); in m48t35_probe()
/openbmc/qemu/hw/sparc64/
H A Dsun4u_iommu.c80 hwaddr baseaddr, offset; in sun4u_translate_iommu() local
101 baseaddr = is->regs[IOMMU_BASE >> 3]; in sun4u_translate_iommu()
159 tte = address_space_ldq_be(&address_space_memory, baseaddr + offset, in sun4u_translate_iommu()
/openbmc/linux/drivers/gpu/drm/sti/
H A Dsti_cursor.h15 void __iomem *baseaddr,

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