| /openbmc/u-boot/drivers/pinctrl/broadcom/ |
| H A D | pinctrl-bcm283x.c | 26 u32 *base_reg; member
41 clrsetbits_le32(&priv->base_reg[reg_offset], in bcm2835_gpio_set_func_id()
51 val = readl(&priv->base_reg[BCM2835_GPIO_FSEL_BANK(gpio)]); in bcm2835_gpio_get_func_id()
117 priv->base_reg = dev_read_addr_ptr(dev); in bcm283x_pinctl_probe()
118 if (priv->base_reg == (void *)FDT_ADDR_T_NONE) { in bcm283x_pinctl_probe()
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| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | clock.c | 590 u32 base_reg, misc_reg; in clock_set_rate() local
596 base_reg = readl(&pll->pll_base); in clock_set_rate()
599 base_reg &= ~(pllinfo->m_mask << pllinfo->m_shift); in clock_set_rate()
600 base_reg |= m << pllinfo->m_shift; in clock_set_rate()
602 base_reg &= ~(pllinfo->n_mask << pllinfo->n_shift); in clock_set_rate()
603 base_reg |= n << pllinfo->n_shift; in clock_set_rate()
605 base_reg &= ~(pllinfo->p_mask << pllinfo->p_shift); in clock_set_rate()
606 base_reg |= p << pllinfo->p_shift; in clock_set_rate()
613 if (base_reg & PLL_BASE_OVRRIDE_MASK) { in clock_set_rate()
614 base_reg |= PLL_ENABLE_MASK; in clock_set_rate()
[all …]
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| /openbmc/u-boot/drivers/pinctrl/mvebu/ |
| H A D | pinctrl-mvebu.c | 48 clrbits_le32(priv->base_reg + AP_EMMC_PHY_CTRL_REG, in mvebu_pinctl_emmc_set_mux()
55 clrbits_le32(priv->base_reg + CP_EMMC_PHY_CTRL_REG, in mvebu_pinctl_emmc_set_mux()
113 clrsetbits_le32(priv->base_reg + reg_offset, in mvebu_pinctrl_set_state()
174 clrsetbits_le32(priv->base_reg + reg_offset, in mvebu_pinctrl_set_state_all()
194 priv->base_reg = devfdt_get_addr_ptr(dev); in mvebu_pinctl_probe()
195 if (priv->base_reg == (void *)FDT_ADDR_T_NONE) { in mvebu_pinctl_probe()
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| H A D | pinctrl-mvebu.h | 23 void *base_reg; member
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| /openbmc/qemu/include/exec/ |
| H A D | gdbstub.h | 16 int base_reg; member
68 * @base_reg: The base number of the register ID.
72 int base_reg);
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| /openbmc/qemu/gdbstub/ |
| H A D | gdbstub.c | 53 int base_reg; member
414 int base_reg) in gdb_feature_builder_init() argument
426 builder->base_reg = base_reg; in gdb_feature_builder_init()
457 name, bitsize, builder->base_reg + regnum, type, group); in gdb_feature_builder_append_reg()
462 name, bitsize, builder->base_reg + regnum, type); in gdb_feature_builder_append_reg()
510 r->base_reg + i, in gdb_get_register_list()
531 if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { in gdb_read_register()
532 return r->get_reg(cpu, buf, reg - r->base_reg); in gdb_read_register()
555 gdb_register_feature(CPUState * cpu,int base_reg,gdb_get_reg_cb get_reg,gdb_set_reg_cb set_reg,const GDBFeature * feature) gdb_register_feature() argument
610 int base_reg = cpu->gdb_num_regs; gdb_register_coprocessor() local
[all...] |
| /openbmc/qemu/target/arm/ |
| H A D | gdbstub.c | 319 static GDBFeature *arm_gen_dynamic_sysreg_feature(CPUState *cs, int base_reg) in arm_gen_dynamic_sysreg_feature()
329 base_reg);
429 int base_reg) in arm_gen_dynamic_m_systemreg_feature()
439 base_reg); in arm_gen_dynamic_m_systemreg_feature()
472 int base_reg) in arm_gen_dynamic_m_secextreg_feature()
482 base_reg); in arm_gen_dynamic_m_secextreg_feature()
309 arm_gen_dynamic_sysreg_feature(CPUState * cs,int base_reg) arm_gen_dynamic_sysreg_feature() argument
419 arm_gen_dynamic_m_systemreg_feature(CPUState * cs,int base_reg) arm_gen_dynamic_m_systemreg_feature() argument
462 arm_gen_dynamic_m_secextreg_feature(CPUState * cs,int base_reg) arm_gen_dynamic_m_secextreg_feature() argument
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| H A D | gdbstub64.c | 540 GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cs, int base_reg) in handle_Q_memtag()
552 base_reg); in handle_Q_memtag()
592 GDBFeature *arm_gen_dynamic_smereg_feature(CPUState *cs, int base_reg) in handle_Q_memtag()
602 base_reg);
627 GDBFeature *arm_gen_dynamic_tls_feature(CPUState *cs, int base_reg)
635 base_reg); in aarch64_cpu_register_gdb_commands()
364 arm_gen_dynamic_svereg_feature(CPUState * cs,int base_reg) arm_gen_dynamic_svereg_feature() argument
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| H A D | internals.h | 1720 GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cpu, int base_reg);
1721 GDBFeature *arm_gen_dynamic_smereg_feature(CPUState *cpu, int base_reg);
1722 GDBFeature *arm_gen_dynamic_tls_feature(CPUState *cpu, int base_reg);
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| /openbmc/qemu/target/riscv/ |
| H A D | gdbstub.c | 254 static GDBFeature *riscv_gen_dynamic_csr_feature(CPUState *cs, int base_reg) in riscv_gen_dynamic_csr_feature() argument
276 base_reg); in riscv_gen_dynamic_csr_feature()
303 static GDBFeature *ricsv_gen_dynamic_vector_feature(CPUState *cs, int base_reg) in ricsv_gen_dynamic_vector_feature() argument
312 base_reg); in ricsv_gen_dynamic_vector_feature()
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| /openbmc/qemu/scripts/ |
| H A D | feature_to_c.py | 84 base_reg = min(regnums) variable
85 num_regs = max(regnums) - base_reg + 1 if len(regnums) else 0
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| /openbmc/qemu/target/i386/emulate/ |
| H A D | x86_decode.c | 1715 int base_reg = decode->sib.base; in get_sib_val()
1720 if (decode->modrm.mod || base_reg != R_EBP) { in get_sib_val()
1722 base_reg |= R_R8; in get_sib_val()
1724 if (base_reg == R_ESP || base_reg == R_EBP) { in get_sib_val()
1705 int base_reg = decode->sib.base; get_sib_val() local
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | op_helper.c | 92 uint32_t base_reg = desc >> 2; in HELPER() local
98 reg = base_reg + (index >> 3); in HELPER()
|