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Searched refs:base_addr (Results 1 – 25 of 587) sorted by relevance

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/openbmc/qemu/tests/qtest/
H A Dnpcm7xx_smbus-test.c223 check_running(qts, base_addr); in start_transfer()
345 disable_bus(qts, base_addr); in test_disable_bus()
362 enable_bus(qts, base_addr); in test_invalid_addr()
367 stop_transfer(qts, base_addr); in test_invalid_addr()
368 check_running(qts, base_addr); in test_invalid_addr()
371 check_stopped(qts, base_addr); in test_invalid_addr()
385 enable_bus(qts, base_addr); in test_single_mode()
394 stop_transfer(qts, base_addr); in test_single_mode()
403 send_nack(qts, base_addr); in test_single_mode()
421 enable_bus(qts, base_addr); in test_fifo_mode()
[all …]
/openbmc/linux/include/trace/events/
H A Dpercpu.h27 __field( void *, base_addr )
39 __entry->base_addr = base_addr;
58 TP_ARGS(base_addr, off, ptr),
67 __entry->base_addr = base_addr;
103 TP_PROTO(void *base_addr),
105 TP_ARGS(base_addr),
108 __field( void *, base_addr )
112 __entry->base_addr = base_addr;
120 TP_PROTO(void *base_addr),
122 TP_ARGS(base_addr),
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-ftintc010.c26 #define FT010_IRQ_SOURCE(base_addr) (base_addr + 0x00) argument
27 #define FT010_IRQ_MASK(base_addr) (base_addr + 0x04) argument
28 #define FT010_IRQ_CLEAR(base_addr) (base_addr + 0x08) argument
30 #define FT010_IRQ_MODE(base_addr) (base_addr + 0x0C) argument
32 #define FT010_IRQ_POLARITY(base_addr) (base_addr + 0x10) argument
33 #define FT010_IRQ_STATUS(base_addr) (base_addr + 0x14) argument
34 #define FT010_FIQ_SOURCE(base_addr) (base_addr + 0x20) argument
35 #define FT010_FIQ_MASK(base_addr) (base_addr + 0x24) argument
36 #define FT010_FIQ_CLEAR(base_addr) (base_addr + 0x28) argument
37 #define FT010_FIQ_MODE(base_addr) (base_addr + 0x2C) argument
[all …]
/openbmc/linux/drivers/char/ipmi/
H A Dipmi_dmi.c70 p.addr = base_addr; in dmi_add_platform_ipmi()
83 info->addr = base_addr; in dmi_add_platform_ipmi()
101 unsigned long base_addr) in ipmi_dmi_get_slave_addr() argument
108 info->addr == base_addr) in ipmi_dmi_get_slave_addr()
130 unsigned long base_addr; in dmi_decode_ipmi() local
143 if (!base_addr) { in dmi_decode_ipmi()
150 base_addr = data[DMI_IPMI_ADDR] >> 1; in dmi_decode_ipmi()
151 if (base_addr == 0) { in dmi_decode_ipmi()
161 if (base_addr & 1) { in dmi_decode_ipmi()
163 base_addr &= DMI_IPMI_IO_MASK; in dmi_decode_ipmi()
[all …]
/openbmc/qemu/tests/qtest/libqos/
H A Dsdhci-cmd.c78 qtest_writew(qts, base_addr + SDHC_BLKSIZE, blksize); in sdhci_cmd_regs()
79 qtest_writew(qts, base_addr + SDHC_BLKCNT, blkcnt); in sdhci_cmd_regs()
80 qtest_writel(qts, base_addr + SDHC_ARGUMENT, argument); in sdhci_cmd_regs()
81 qtest_writew(qts, base_addr + SDHC_TRNMOD, trnmod); in sdhci_cmd_regs()
82 qtest_writew(qts, base_addr + SDHC_CMDREG, cmdreg); in sdhci_cmd_regs()
88 sdhci_cmd_regs(qts, base_addr, count, 1, 0, in sdhci_read_cmd()
95 sdhci_cmd_regs(qts, base_addr, 0, 0, 0, in sdhci_read_cmd()
105 sdhci_cmd_regs(qts, base_addr, blksize, 1, 0, in sdhci_write_cmd()
110 write_fifo(qts, base_addr + SDHC_BDATA, msg, count); in sdhci_write_cmd()
111 fill_block(qts, base_addr + SDHC_BDATA, (blksize - count) / 4); in sdhci_write_cmd()
[all …]
/openbmc/linux/drivers/parisc/
H A Ddino.c177 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_read() local
185 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_read()
193 *val = readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_read()
212 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_write() local
221 __raw_readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
224 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
231 writel(val, base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
322 __raw_readl(dino_dev->hba.base_addr+DINO_IPR); in dino_unmask_irq()
424 dino_dev->hba.base_addr, mask); in dino_isr()
713 dino_dev->hba.base_addr+DINO_IO_COMMAND); in dino_card_init()
[all …]
H A Dlba_pci.c358 LBA_CFG_RESTORE(d, d->hba.base_addr); in lba_rd_cfg()
421 LBA_CFG_RESTORE(d, d->hba.base_addr); in lba_wr_cfg()
1358 d->hba.base_addr, in lba_hw_init()
1359 READ_REG64(d->hba.base_addr + LBA_STAT_CTL), in lba_hw_init()
1364 READ_REG64(d->hba.base_addr + LBA_ARB_MASK), in lba_hw_init()
1365 READ_REG64(d->hba.base_addr + LBA_ARB_PRI), in lba_hw_init()
1366 READ_REG64(d->hba.base_addr + LBA_ARB_MODE), in lba_hw_init()
1555 lba_dev->hba.base_addr = addr; in lba_driver_probe()
1707 WRITE_REG32( imask, base_addr + LBA_IMASK); in lba_set_iregs()
1708 WRITE_REG32( ibase, base_addr + LBA_IBASE); in lba_set_iregs()
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/openbmc/u-boot/include/
H A Dnetdev.h31 int calxedaxgmac_initialize(u32 id, ulong base_addr);
32 int cs8900_initialize(u8 dev_num, int base_addr);
35 int designware_initialize(ulong base_addr, u32 interface);
40 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
42 int ethoc_initialize(u8 dev_num, int base_addr);
49 int ks8851_mll_initialize(u8 dev_num, int base_addr);
50 int lan91c96_initialize(u8 dev_num, int base_addr);
68 int smc91111_initialize(u8 dev_num, int base_addr);
69 int smc911x_initialize(u8 dev_num, int base_addr);
72 int armada100_fec_register(unsigned long base_addr);
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/openbmc/u-boot/drivers/video/
H A Dmali_dp.c88 phys_addr_t base_addr; member
103 static int malidp_get_hwid(phys_addr_t base_addr) in malidp_get_hwid() argument
111 hwid = readl(base_addr + MALIDP_CORE_ID); in malidp_get_hwid()
211 writel(val, malidp->base_addr + layer_offset + in malidp_setup_layer()
226 setbits_le32(malidp->base_addr + layer_offset + in malidp_setup_layer()
322 priv->base_addr = (phys_addr_t)dev_read_addr(dev); in malidp_probe()
327 value = malidp_get_hwid(priv->base_addr); in malidp_probe()
334 priv->dc_status_addr = priv->base_addr; in malidp_probe()
335 priv->dc_control_addr = priv->base_addr + 0xc; in malidp_probe()
336 priv->cval_addr = priv->base_addr + 0xf00; in malidp_probe()
[all …]
/openbmc/linux/drivers/fpga/
H A Daltera-freeze-bridge.c34 void __iomem *base_addr; member
45 void __iomem *csr_illegal_req_addr = priv->base_addr + in altera_freeze_br_req_ack()
91 void __iomem *csr_ctrl_addr = priv->base_addr + in altera_freeze_br_do_freeze()
126 void __iomem *csr_ctrl_addr = priv->base_addr + in altera_freeze_br_do_unfreeze()
212 void __iomem *base_addr; in altera_freeze_br_probe() local
220 base_addr = devm_platform_ioremap_resource(pdev, 0); in altera_freeze_br_probe()
221 if (IS_ERR(base_addr)) in altera_freeze_br_probe()
222 return PTR_ERR(base_addr); in altera_freeze_br_probe()
224 revision = readl(base_addr + FREEZE_CSR_REG_VERSION); in altera_freeze_br_probe()
240 status = readl(base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_probe()
[all …]
/openbmc/linux/tools/testing/selftests/mm/
H A Dmap_fixed_noreplace.c45 unsigned long base_addr; in main() local
53 base_addr = find_base_addr(size); in main()
54 if (!base_addr) { in main()
63 addr = base_addr; in main()
84 addr = base_addr + page_size; in main()
104 addr = base_addr; in main()
125 addr = base_addr + (2 * page_size); in main()
145 addr = base_addr + (3 * page_size); in main()
165 addr = base_addr; in main()
185 addr = base_addr; in main()
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/openbmc/linux/drivers/gpio/
H A Dgpio-zynq.c128 void __iomem *base_addr; member
680 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
711 gpio->base_addr + in zynq_gpio_restore_context()
714 gpio->base_addr + in zynq_gpio_restore_context()
717 gpio->base_addr + in zynq_gpio_restore_context()
720 gpio->base_addr + in zynq_gpio_restore_context()
723 gpio->base_addr + in zynq_gpio_restore_context()
726 gpio->base_addr + in zynq_gpio_restore_context()
729 gpio->base_addr + in zynq_gpio_restore_context()
920 if (IS_ERR(gpio->base_addr)) in zynq_gpio_probe()
[all …]
H A Dgpio-ts4800.c22 void __iomem *base_addr; in ts4800_gpio_probe() local
30 base_addr = devm_platform_ioremap_resource(pdev, 0); in ts4800_gpio_probe()
31 if (IS_ERR(base_addr)) in ts4800_gpio_probe()
32 return PTR_ERR(base_addr); in ts4800_gpio_probe()
44 retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET, in ts4800_gpio_probe()
45 base_addr + OUTPUT_REG_OFFSET, NULL, in ts4800_gpio_probe()
46 base_addr + DIRECTION_REG_OFFSET, NULL, 0); in ts4800_gpio_probe()
/openbmc/linux/drivers/net/ethernet/ti/
H A Dtlan.h444 static inline u8 tlan_dio_read8(u16 base_addr, u16 internal_addr) in tlan_dio_read8() argument
446 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read8()
456 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read16()
466 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read32()
467 return inl(base_addr + TLAN_DIO_DATA); in tlan_dio_read32()
476 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write8()
477 outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3)); in tlan_dio_write8()
486 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write16()
487 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); in tlan_dio_write16()
496 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write32()
[all …]
H A Dtlan.c504 dev->base_addr = pci_io_base; in tlan_probe1()
521 dev->base_addr = ioaddr; in tlan_probe1()
579 (int)dev->base_addr, in tlan_probe1()
1221 tlan_print_dio(dev->base_addr); in tlan_get_stats()
2507 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2513 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2534 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2537 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2559 tlan_mii_sync(dev->base_addr); in tlan_phy_reset()
2848 tlan_mii_sync(dev->base_addr); in __tlan_mii_read_reg()
[all …]
/openbmc/linux/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c262 msr = inb(MSR(dev->base_addr)); in ser12_interrupt()
269 inb(LSR(dev->base_addr)); in ser12_interrupt()
273 inb(RBR(dev->base_addr)); in ser12_interrupt()
302 iir = inb(IIR(dev->base_addr)); in ser12_interrupt()
381 if (!dev->base_addr || dev->base_addr > 0xffff-SER12_EXTENT || in ser12_open()
395 dev->base_addr); in ser12_open()
407 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
408 outb(0, IER(dev->base_addr)); in ser12_open()
425 outb(0x0a, IER(dev->base_addr)); in ser12_open()
449 outb(0, IER(dev->base_addr)); in ser12_close()
[all …]
H A Dbaycom_ser_hdx.c160 outb(0, DLM(dev->base_addr)); in ser12_set_divisor()
167 outb(0x00, THR(dev->base_addr)); in ser12_set_divisor()
377 inb(LSR(dev->base_addr)); in ser12_interrupt()
381 inb(RBR(dev->base_addr)); in ser12_interrupt()
398 inb(MSR(dev->base_addr)); in ser12_interrupt()
401 iir = inb(IIR(dev->base_addr)); in ser12_interrupt()
463 if (!dev->base_addr || dev->base_addr > 0x1000-SER12_EXTENT || in ser12_open()
476 outb(0, IER(dev->base_addr)); in ser12_open()
485 outb(2, IER(dev->base_addr)); in ser12_open()
508 outb(0, IER(dev->base_addr)); in ser12_close()
[all …]
/openbmc/linux/drivers/staging/axis-fifo/
H A Daxis-fifo.c334 fifo->base_addr + XLLF_IER_OFFSET); in reset_ip_core()
582 ioread32(fifo->base_addr in axis_fifo_irq()
592 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
600 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
605 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
610 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
615 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
620 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
625 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
842 if (IS_ERR(fifo->base_addr)) { in axis_fifo_probe()
[all …]
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-apmixed.c22 void __iomem *base_addr; member
34 return (readl(tx->base_addr) & REF2USB_EN_MASK) == REF2USB_EN_MASK; in mtk_ref2usb_tx_is_prepared()
42 val = readl(tx->base_addr); in mtk_ref2usb_tx_prepare()
45 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
49 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
52 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
62 val = readl(tx->base_addr); in mtk_ref2usb_tx_unprepare()
64 writel(val, tx->base_addr); in mtk_ref2usb_tx_unprepare()
84 tx->base_addr = reg; in mtk_clk_register_ref2usb_tx()
/openbmc/linux/drivers/clocksource/
H A Dtimer-cadence-ttc.c75 void __iomem *base_addr; member
145 readl_relaxed(timer->base_addr + TTC_ISR_OFFSET); in ttc_clock_event_interrupt()
161 return (u64)readl_relaxed(timer->base_addr + in __ttc_clocksource_read()
266 readl_relaxed(ttccs->ttc.base_addr + in ttc_rate_change_clocksource_cb()
292 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_rate_change_clocksource_cb()
302 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_rate_change_clocksource_cb()
350 ttccs->ttc.base_addr = base; in ttc_setup_clocksource()
364 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_setup_clocksource()
366 ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_setup_clocksource()
433 ttcce->ttc.base_addr = base; in ttc_setup_clockevent()
[all …]
/openbmc/linux/drivers/net/ethernet/8390/
H A Dsmc-ultra.c142 int base_addr = dev->base_addr; in do_ultra_probe() local
146 return ultra_probe1(dev, base_addr); in do_ultra_probe()
147 else if (base_addr != 0) /* Don't probe at all. */ in do_ultra_probe()
279 dev->base_addr = ioaddr+ULTRA_NIC_OFFSET; in ultra_probe1()
361 dev->base_addr = pnp_port_start(idev, 0); in ultra_probe_isapnp()
366 dev->base_addr, dev->irq); in ultra_probe_isapnp()
370 dev->base_addr); in ultra_probe_isapnp()
412 outb_p(E8390_NODMA+E8390_PAGE0, dev->base_addr); in ultra_open()
413 outb(0xff, dev->base_addr + EN0_ERWCNT); in ultra_open()
468 outb(ULTRA_MEMENB, dev->base_addr - ULTRA_NIC_OFFSET); in ultra_block_input()
[all …]
/openbmc/linux/drivers/net/wwan/t7xx/
H A Dt7xx_mhccif.c34 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_clear_interrupts()
82 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_STS); in t7xx_mhccif_read_sw_int_sts()
87 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_SET); in t7xx_mhccif_mask_set()
92 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_CLR); in t7xx_mhccif_mask_clr()
97 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK); in t7xx_mhccif_mask_get()
107 t7xx_dev->base_addr.mhccif_rc_base = t7xx_dev->base_addr.pcie_ext_reg_base + in t7xx_mhccif_init()
109 t7xx_dev->base_addr.pcie_dev_reg_trsl_addr; in t7xx_mhccif_init()
118 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_h2d_swint_trigger()
/openbmc/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_emaclite.c126 void __iomem *base_addr; member
157 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()
183 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_disable_interrupts()
188 drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_disable_interrupts()
642 void __iomem *base_addr = lp->base_addr; in xemaclite_interrupt() local
736 lp->base_addr + XEL_MDIOADDR_OFFSET); in xemaclite_mdio_read()
738 lp->base_addr + XEL_MDIOCTRL_OFFSET); in xemaclite_mdio_read()
785 lp->base_addr + XEL_MDIOADDR_OFFSET); in xemaclite_mdio_write()
788 lp->base_addr + XEL_MDIOCTRL_OFFSET); in xemaclite_mdio_write()
1119 if (IS_ERR(lp->base_addr)) { in xemaclite_of_probe()
[all …]
/openbmc/linux/arch/sparc/prom/
H A Dmemory.c24 sp_banks[index].base_addr = (unsigned long) p->start_adr; in prom_meminit_v0()
43 sp_banks[i].base_addr = reg[i].phys_addr; in prom_meminit_v2()
54 if (x->base_addr > y->base_addr) in sp_banks_cmp()
56 if (x->base_addr < y->base_addr) in sp_banks_cmp()
83 sp_banks[num_ents].base_addr = 0xdeadbeef; in prom_meminit()
/openbmc/linux/drivers/net/arcnet/
H A Dcom90io.c73 int ioaddr = dev->base_addr; in get_buffer_byte()
85 int ioaddr = dev->base_addr; in put_buffer_byte()
98 int ioaddr = dev->base_addr; in get_whole_buffer()
114 int ioaddr = dev->base_addr; in put_whole_buffer()
224 int ioaddr = dev->base_addr; in com90io_found()
282 short ioaddr = dev->base_addr; in com90io_reset()
313 short ioaddr = dev->base_addr; in com90io_command()
320 short ioaddr = dev->base_addr; in com90io_status()
327 short ioaddr = dev->base_addr; in com90io_setmask()
391 dev->base_addr = io; in com90io_init()
[all …]

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