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Searched refs:bank (Results 1 – 25 of 1189) sorted by relevance

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/openbmc/linux/drivers/gpio/
H A Dgpio-omap.c84 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
112 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
139 bank->context.dataout = omap_gpio_rmw(bank->base + bank->regs->dataout, in omap_set_gpio_dataout_mask()
150 bank->base + bank->regs->debounce_en); in omap_gpio_dbck_enable()
246 bank->base + bank->regs->debounce_en); in omap_clear_gpio_debounce()
870 reg = bank->base + bank->regs->datain; in omap_gpio_get()
872 reg = bank->base + bank->regs->dataout; in omap_gpio_get()
884 bank->set_dataout(bank, offset, value); in omap_gpio_output()
963 bank->set_dataout(bank, offset, value); in omap_gpio_set()
1020 bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); in omap_gpio_mod_init()
[all …]
H A Dgpio-rockchip.c189 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_gpio_get()
207 if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { in rockchip_gpio_set_debounce()
338 dev_dbg(bank->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
424 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_irq_set_type()
517 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
531 bank->name); in rockchip_interrupts_register()
649 bank->reg_base = devm_ioremap_resource(bank->dev, &res); in rockchip_get_bank_data()
653 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
657 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
668 bank->db_clk = of_clk_get(bank->of_node, 1); in rockchip_get_bank_data()
[all …]
H A Dgpio-brcmstb.c27 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
28 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
29 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
30 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
31 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
32 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
75 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
76 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
206 bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id), in brcmstb_gpio_irq_set_type()
208 bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id), in brcmstb_gpio_irq_set_type()
[all …]
/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dsh_pfc.h357 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
485 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
486 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
487 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
488 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
489 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
490 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
491 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
492 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
500 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
[all …]
/openbmc/linux/drivers/pinctrl/renesas/
H A Dsh_pfc.h442 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
593 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
594 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
595 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
596 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
597 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
598 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
599 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
600 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
608 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
[all …]
/openbmc/u-boot/cmd/
H A Dflash.c60 bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS || in abbrev_spec()
100 for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS && !found; ++bank) { in flash_sect_roundb()
198 for (bank=0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { in flash_fill_sect_ranges()
246 if (s_last[bank] < s_first[bank]) { in flash_fill_sect_ranges()
254 (*s_count) += s_last[bank] - s_first[bank] + 1; in flash_fill_sect_ranges()
279 for (bank=0; bank <CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { in do_flinfo()
316 for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { in do_flerase()
410 erased += s_last[bank] - s_first[bank] + 1; in flash_sect_erase()
464 for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { in do_protect()
608 if (s_first[bank]>=0 && s_first[bank]<=s_last[bank]) { in flash_sect_protect()
[all …]
/openbmc/qemu/hw/intc/
H A Domap_intc.c153 bank->irqs = (bank->inputs &= ~(1 << n)) | bank->swi; in omap_set_intr_noedge()
178 bank = &s->bank[line_no >> 5]; in omap_inth_read()
247 bank->irqs &= value | (bank->inputs & bank->sens_edge); in omap_inth_write()
435 bank = &s->bank[bank_no]; in omap2_inth_read()
485 return bank->irqs & ~bank->mask & ~bank->fiq; in omap2_inth_read()
488 return bank->irqs & ~bank->mask & bank->fiq; in omap2_inth_read()
495 bank = &s->bank[bank_no]; in omap2_inth_read()
516 bank = &s->bank[bank_no]; in omap2_inth_write()
577 bank->irqs |= bank->swi |= value; in omap2_inth_write()
584 bank->irqs = bank->swi & bank->inputs; in omap2_inth_write()
[all …]
/openbmc/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.c256 bank += (group - 1); in exynos_eint_gpio_irq()
295 bank = d->pin_banks; in exynos_eint_gpio_init()
306 bank->irq_chip->chip.name = bank->name; in exynos_eint_gpio_init()
308 bank->irq_domain = irq_domain_create_linear(bank->fwnode, in exynos_eint_gpio_init()
309 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_gpio_init()
329 for (--i, --bank; i >= 0; --i, --bank) { in exynos_eint_gpio_init()
478 struct samsung_pin_bank *bank = eintd->bank; in exynos_irq_eint0_15() local
564 bank->irq_chip->chip.name = bank->name; in exynos_eint_wkup_init()
566 bank->irq_domain = irq_domain_create_linear(bank->fwnode, in exynos_eint_wkup_init()
567 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_wkup_init()
[all …]
/openbmc/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_transport.c66 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
68 csr_ops->write_csr_int_col_ctl(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
79 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_disable_ring_irq()
162 struct adf_etr_bank_data *bank = ring->bank; in adf_init_ring() local
269 ring->bank = bank; in adf_create_ring()
306 struct adf_etr_bank_data *bank = ring->bank; in adf_remove_ring() local
314 csr_ops->write_csr_ring_config(bank->csr_addr, bank->bank_number, in adf_remove_ring()
316 csr_ops->write_csr_ring_base(bank->csr_addr, bank->bank_number, in adf_remove_ring()
398 memset(bank, 0, sizeof(*bank)); in adf_init_bank()
408 if (!bank->rings) in adf_init_bank()
[all …]
H A Dadf_gen4_hw_data.h30 ADF_RING_BUNDLE_SIZE * (bank) + \
34 ADF_RING_BUNDLE_SIZE * (bank) + \
41 ADF_RING_BUNDLE_SIZE * (bank) + \
46 u32 _bank = bank; \
62 ADF_RING_BUNDLE_SIZE * (bank) + \
66 ADF_RING_BUNDLE_SIZE * (bank) + \
70 ADF_RING_BUNDLE_SIZE * (bank) + \
74 ADF_RING_BUNDLE_SIZE * (bank) + \
78 ADF_RING_BUNDLE_SIZE * (bank) + \
121 #define ADF_WQM_CSR_RPRESETCTL(bank) (0x6000 + ((bank) << 3)) argument
[all …]
H A Dadf_transport_debug.c44 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show() local
46 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
61 ring->ring_number, ring->bank->bank_number); in adf_ring_show()
104 ring->bank->bank_debug_dir, in adf_ring_debugfs_add()
121 struct adf_etr_bank_data *bank = sfile->private; in adf_bank_start() local
152 bank->bank_number); in adf_bank_show()
156 void __iomem *csr = bank->csr_addr; in adf_bank_show()
159 if (!(bank->ring_mask & 1 << ring_id)) in adf_bank_show()
200 bank->bank_debug_dir, bank, in adf_bank_debugfs_add()
207 debugfs_remove(bank->bank_debug_cfg); in adf_bank_debugfs_rm()
[all …]
/openbmc/linux/arch/x86/kernel/cpu/mce/
H A Damd.c581 b.bank = bank; in prepare_threshold_block()
687 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in mce_amd_feature_init()
737 m.bank = bank; in __log_error()
789 if (!_log_error_bank(bank, mca_msr_reg(bank, MCA_STATUS), in _log_error_deferred()
823 _log_error_bank(bank, MSR_AMD64_SMCA_MCx_DESTAT(bank), in log_error_deferred()
832 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) in amd_deferred_error_interrupt()
882 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in amd_threshold_interrupt()
1100 b->bank = bank; in allocate_threshold_blocks()
1297 kfree(bank); in threshold_remove_bank()
1304 for (bank = 0; bank < numbanks; bank++) { in __threshold_remove_device()
[all …]
/openbmc/linux/tools/testing/selftests/gpio/
H A Dgpio-sim.sh181 create_bank chip bank
188 create_bank chip bank
195 create_bank chip bank
204 create_bank chip bank
211 create_bank chip bank
219 create_bank chip bank
227 create_bank chip bank
234 create_bank chip bank
245 create_bank chip bank
255 create_bank chip bank
[all …]
/openbmc/qemu/hw/ppc/
H A Dppc4xx_sdram.c113 trace_ppc4xx_sdram_map(bank->base, bank->size); in sdram_bank_map()
115 memory_region_add_subregion(&bank->container, 0, &bank->ram); in sdram_bank_map()
122 trace_ppc4xx_sdram_unmap(bank->base, bank->size); in sdram_bank_unmap()
124 memory_region_del_subregion(&bank->container, &bank->ram); in sdram_bank_unmap()
134 bank->bcr = bcr; in sdram_bank_set_bcr()
409 s->bank[i].bcr = sdram_ddr_bcr(s->bank[i].base, s->bank[i].size); in ppc4xx_sdram_ddr_realize()
410 sdram_bank_set_bcr(&s->bank[i], s->bank[i].bcr, in ppc4xx_sdram_ddr_realize()
411 s->bank[i].base, s->bank[i].size, 0); in ppc4xx_sdram_ddr_realize()
676 s->bank[i].bcr = sdram_ddr2_bcr(s->bank[i].base, s->bank[i].size); in ppc4xx_sdram_ddr2_realize()
678 sdram_bank_set_bcr(&s->bank[i], s->bank[i].bcr, in ppc4xx_sdram_ddr2_realize()
[all …]
/openbmc/linux/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c302 if (bank->secure_control) { in stm32_gpio_init_valid_mask()
496 bank); in stm32_gpio_domain_alloc()
1314 if (!IS_ERR(bank->rstc)) in stm32_gpiolib_register_bank()
1321 if (IS_ERR(bank->base)) in stm32_gpiolib_register_bank()
1358 bank->gpio_chip.base = -1; in stm32_gpiolib_register_bank()
1363 bank->bank_nr = bank_nr; in stm32_gpiolib_register_bank()
1370 bank->fwnode = fwnode; in stm32_gpiolib_register_bank()
1374 bank); in stm32_gpiolib_register_bank()
1376 if (!bank->domain) { in stm32_gpiolib_register_bank()
1398 err = gpiochip_add_data(&bank->gpio_chip, bank); in stm32_gpiolib_register_bank()
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_board.c61 memmove(&tegra_mem_map[bank + 1], &tegra_mem_map[bank], in mark_ram_allocated()
62 CONFIG_NR_DRAM_BANKS - bank - 1); in mark_ram_allocated()
64 bank++; in mark_ram_allocated()
80 tegra_mem_map[bank].size = 0; in mark_ram_allocated()
86 int bank; in reserve_ram() local
89 for (bank = 1; bank <= CONFIG_NR_DRAM_BANKS; bank++) { in reserve_ram()
96 mark_ram_allocated(bank, start, end); in reserve_ram()
103 int bank; in alloc_ram() local
105 for (bank = 1; bank <= CONFIG_NR_DRAM_BANKS; bank++) { in alloc_ram()
214 int bank; in dump_ram_banks() local
[all …]
/openbmc/u-boot/drivers/gpio/
H A Domap_gpio.c57 void *reg = bank->base; in _set_gpio_direction()
76 void *reg = bank->base; in _get_gpio_direction()
92 void *reg = bank->base; in _set_gpio_dataout()
106 void *reg = bank->base; in _get_gpio_value()
145 const struct gpio_bank *bank; in gpio_set_value() local
149 bank = get_gpio_bank(gpio); in gpio_set_value()
160 const struct gpio_bank *bank; in gpio_get_value() local
164 bank = get_gpio_bank(gpio); in gpio_get_value()
174 const struct gpio_bank *bank; in gpio_direction_input() local
179 bank = get_gpio_bank(gpio); in gpio_direction_input()
[all …]
H A Dintel_ich6_gpio.c62 if (bank->use_lvl_write_cache) in _ich6_gpio_set_value()
63 val = bank->lvl_write_cache; in _ich6_gpio_set_value()
65 val = inl(bank->lvl); in _ich6_gpio_set_value()
71 outl(val, bank->lvl); in _ich6_gpio_set_value()
72 if (bank->use_lvl_write_cache) in _ich6_gpio_set_value()
73 bank->lvl_write_cache = val; in _ich6_gpio_set_value()
138 bank->lvl_write_cache = 0; in ich6_gpio_probe()
154 tmplong = inl(bank->use_sel); in ich6_gpio_request()
190 tmplong = inl(bank->lvl); in ich6_gpio_get_value()
191 if (bank->use_lvl_write_cache) in ich6_gpio_get_value()
[all …]
H A Ds5p_gpio.c37 struct s5p_gpio_bank *bank; member
43 struct s5p_gpio_bank *bank; member
63 return bank; in s5p_gpio_get_bank()
77 value = readl(&bank->con); in s5p_gpio_cfg_pin()
80 writel(value, &bank->con); in s5p_gpio_cfg_pin()
87 value = readl(&bank->dat); in s5p_gpio_set_value()
91 writel(value, &bank->dat); in s5p_gpio_set_value()
108 value = readl(&bank->con); in s5p_gpio_get_cfg_pin()
117 value = readl(&bank->dat); in s5p_gpio_get_value()
295 priv->bank = plat->bank; in gpio_exynos_probe()
[all …]
H A Dxilinx_gpio.c39 u32 bank, max_pins; in xilinx_gpio_get_bank_pin() local
43 for (bank = 0; bank < XILINX_GPIO_MAX_BANK; bank++) { in xilinx_gpio_get_bank_pin()
47 bank, pin_num); in xilinx_gpio_get_bank_pin()
48 *bank_num = bank; in xilinx_gpio_get_bank_pin()
64 u32 bank, pin; in xilinx_gpio_set_value() local
70 val = priv->output_val[bank]; in xilinx_gpio_set_value()
82 priv->output_val[bank] = val; in xilinx_gpio_set_value()
92 u32 bank, pin; in xilinx_gpio_get_value() local
118 u32 bank, pin; in xilinx_gpio_get_function() local
147 u32 bank, pin; in xilinx_gpio_direction_output() local
[all …]
H A Daspeed_gpio.c147 const struct aspeed_gpio_bank *bank, in bank_reg() argument
154 return gpio->regs + bank->rdata_reg; in bank_reg()
172 return gpio->regs + bank->tolerance_regs; in bank_reg()
187 unsigned int bank = GPIO_BANK(offset); in to_bank() local
189 WARN_ON(bank >= ARRAY_SIZE(aspeed_gpio_banks)); in to_bank()
190 return &aspeed_gpio_banks[bank]; in to_bank()
198 u32 dir = readl(bank_reg(priv, bank, reg_dir)); in aspeed_gpio_direction_input()
201 writel(dir, bank_reg(priv, bank, reg_dir)); in aspeed_gpio_direction_input()
216 writel(dir, bank_reg(priv, bank, reg_dir)); in aspeed_gpio_direction_output()
223 writel(output, bank_reg(priv, bank, reg_val)); in aspeed_gpio_direction_output()
[all …]
/openbmc/linux/drivers/net/phy/mscc/
H A Dmscc_macsec.c36 if (bank >> 2 == 0x1) in vsc8584_macsec_phy_read()
38 bank &= 0x3; in vsc8584_macsec_phy_read()
40 bank = 0; in vsc8584_macsec_phy_read()
74 if ((bank >> 2 == 0x1) || (bank >> 2 == 0x3)) in vsc8584_macsec_phy_write()
75 bank &= 0x3; in vsc8584_macsec_phy_write()
78 bank = 0; in vsc8584_macsec_phy_write()
374 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow() local
464 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow_enable() local
483 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow_disable() local
524 enum macsec_bank bank = flow->bank; in vsc8584_macsec_transformation() local
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c62 int bank; member
110 int bank = lanes[lane].bank; in serdes_lane_enabled() local
452 clrbits_be32(&regs->bank[bank].pllcr1, in p4080_erratum_serdes_a005()
472 rstctl = in_be32(&srds_regs->bank[bank].rstctl); in wait_for_rstdone()
552 for (bank = 1; bank < ARRAY_SIZE(srds_lpd_b); bank++) { in fsl_serdes_init()
634 for (bank = 0; bank < SRDS_MAX_BANK; bank++) { in fsl_serdes_init()
644 setbits_be32(&srds_regs->bank[bank].rstctl, in fsl_serdes_init()
647 setbits_be32(&srds_regs->bank[bank].rstctl, in fsl_serdes_init()
664 for (bank = FSL_SRDS_BANK_2; bank <= FSL_SRDS_BANK_3; bank++) { in fsl_serdes_init()
669 if (lanes[lane].bank == bank) in fsl_serdes_init()
[all …]
/openbmc/linux/drivers/bus/
H A Duniphier-system-bus.c45 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
86 priv->bank[bank].base = paddr; in uniphier_system_bus_add_bank()
87 priv->bank[bank].end = end; in uniphier_system_bus_add_bank()
90 bank, priv->bank[bank].base, priv->bank[bank].end); in uniphier_system_bus_add_bank()
102 if (priv->bank[i].end > priv->bank[j].base && in uniphier_system_bus_check_overlap()
103 priv->bank[i].base < priv->bank[j].end) { in uniphier_system_bus_check_overlap()
130 swap(priv->bank[0], priv->bank[1]); in uniphier_system_bus_check_boot_swap()
141 base = priv->bank[i].base; in uniphier_system_bus_set_reg()
[all …]
/openbmc/u-boot/drivers/pinctrl/rockchip/
H A Dpinctrl-rockchip-core.c24 if (bank >= ctrl->nr_banks) { in rockchip_verify_config()
48 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
139 if (bank->recalced_mask & BIT(pin)) in rockchip_get_mux()
222 if (bank->route_mask & BIT(pin)) { in rockchip_set_mux()
597 bank = cells[4 * i + 0];
661 struct rockchip_pin_bank *bank; local
668 bank = ctrl->pin_banks;
673 bank->priv = priv;
674 bank->pin_base = ctrl->nr_pins;
675 ctrl->nr_pins += bank->nr_pins;
[all …]

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