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Searched refs:arm_hcr_el2_eff (Results 1 – 13 of 13) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dop_helper.c52 if (target_el == 1 && (arm_hcr_el2_eff(env) & HCR_TGE)) { in raise_exception()
355 if (arm_hcr_el2_eff(env) & mask) { in check_wfx_trap()
794 (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE)) { in HELPER()
902 if (arm_hcr_el2_eff(env) & HCR_TIDCP) { in HELPER()
1092 !(arm_hcr_el2_eff(env) & HCR_NV) && in HELPER()
1108 if (cur_el == 1 && (arm_hcr_el2_eff(env) & HCR_TSC)) { in HELPER()
1220 uint64_t hcr = arm_hcr_el2_eff(env); in HELPER()
H A Dhflags.c58 if (el < 2 && (arm_hcr_el2_eff(env) & (HCR_DC | HCR_VM))) { in aprofile_require_alignment()
172 (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE)) { in rebuild_hflags_a32()
210 uint64_t hcr = arm_hcr_el2_eff(env); in rebuild_hflags_a64()
H A Dtlb_helper.c229 if (arm_hcr_el2_eff(env) & HCR_GPF) { in arm_deliver_fault()
H A Dhelper-a64.c820 if (new_el == 1 && (arm_hcr_el2_eff(env) & HCR_TGE)) { in HELPER()
997 (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE) && in mops_enabled()
1032 if (el == 0 && (arm_hcr_el2_eff(env) & HCR_TGE)) { in mops_mismatch_exception_target_el()
H A Dpauth_helper.c467 uint64_t hcr = arm_hcr_el2_eff(env); in pauth_check_trap()
/openbmc/qemu/target/arm/
H A Ddebug_helper.c202 hcr_el2 = arm_hcr_el2_eff(env); in linked_bp_matches()
794 (arm_hcr_el2_eff(env) & HCR_TGE); in access_tdosa()
815 (arm_hcr_el2_eff(env) & HCR_TGE); in access_tdra()
836 (arm_hcr_el2_eff(env) & HCR_TGE); in access_tda()
871 (arm_hcr_el2_eff(env) & HCR_TGE); in access_tdcc()
H A Dhelper.c341 if (arm_hcr_el2_eff(env) & trap) { in access_tvm_trvm()
2502 hcr = arm_hcr_el2_eff(env); in gt_cntfrq_access()
2536 uint64_t hcr = arm_hcr_el2_eff(env); in gt_counter_access()
2574 uint64_t hcr = arm_hcr_el2_eff(env); in gt_timer_access()
2812 hcr = arm_hcr_el2_eff(env); in gt_virt_cnt_offset()
2818 hcr = arm_hcr_el2_eff(env); in gt_virt_cnt_offset()
4912 uint64_t hcr = arm_hcr_el2_eff(env); in vae1_tlbmask()
10790 hcr_el2 = arm_hcr_el2_eff(env); in arm_phys_excp_target_el()
11581 hcr = arm_hcr_el2_eff(env); in arm_cpu_do_interrupt_aarch64()
12470 hcr_el2 = arm_hcr_el2_eff(env); in fp_exception_el()
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H A Dcpu.c833 uint64_t hcr_el2 = arm_hcr_el2_eff(env); in arm_cpu_exec_interrupt()
944 bool new_state = ((arm_hcr_el2_eff(env) & HCR_VI) && in arm_cpu_update_virq()
966 bool new_state = ((arm_hcr_el2_eff(env) & HCR_VF) && in arm_cpu_update_vfiq()
988 bool new_state = ((arm_hcr_el2_eff(env) & HCR_VI) && in arm_cpu_update_vinmi()
1009 bool new_state = (arm_hcr_el2_eff(env) & HCR_VF) && in arm_cpu_update_vfnmi()
1222 uint64_t hcr = arm_hcr_el2_eff(env); in aarch64_cpu_dump_state()
H A Dinternals.h1358 uint64_t hcr = arm_hcr_el2_eff(env); in allocation_tag_access_enabled()
1736 (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE) && in arm_fgt_active()
H A Dvfp_helper.c1259 if (!(arm_hcr_el2_eff(env) & HCR_TID3)) { in HELPER()
1264 if (!(arm_hcr_el2_eff(env) & HCR_TID0)) { in HELPER()
H A Dcpu.h2589 uint64_t arm_hcr_el2_eff(CPUARMState *env);
H A Dptw.c2127 device = S2_attrs_are_device(arm_hcr_el2_eff(env), in get_phys_addr_lpae()
/openbmc/qemu/hw/intc/
H A Darm_gicv3_cpuif.c100 uint64_t hcr_el2 = arm_hcr_el2_eff(env); in icv_access()
1925 uint64_t hcr_el2 = arm_hcr_el2_eff(env); in icc_dir_write()
2286 if ((arm_hcr_el2_eff(env) & (HCR_IMO | HCR_FMO)) == 0) { in gicv3_irqfiq_access()
2327 (arm_hcr_el2_eff(env) & (HCR_IMO | HCR_FMO)) != 0) { in gicv3_sgi_access()
2351 if ((arm_hcr_el2_eff(env) & HCR_FMO) == 0) { in gicv3_fiq_access()
2390 if ((arm_hcr_el2_eff(env) & HCR_IMO) == 0) { in gicv3_irq_access()