| /openbmc/linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | apll.txt | 17 - compatible : shall be "ti,dra7-apll-clock" or "ti,omap2-apll-clock"
34 compatible = "ti,dra7-apll-clock";
39 compatible = "ti,omap2-apll-clock";
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| /openbmc/linux/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-dai-tdm.c | 440 int apll; in mtk_dai_tdm_cal_mclk() local
443 apll = mt8183_get_apll_by_rate(afe, freq); in mtk_dai_tdm_cal_mclk()
444 apll_rate = mt8183_get_apll_rate(afe, apll); in mtk_dai_tdm_cal_mclk()
459 tdm_priv->mclk_apll = apll; in mtk_dai_tdm_cal_mclk()
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| H A D | mt8183-afe-clk.h | 32 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll);
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| H A D | mt8183-afe-clk.c | 487 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8183_get_apll_rate() argument
489 return (apll == MT8183_APLL1) ? 180633600 : 196608000; in mt8183_get_apll_rate()
545 int apll = mt8183_get_apll_by_rate(afe, rate); in mt8183_mck_enable() local
546 int apll_clk_id = apll == MT8183_APLL1 ? in mt8183_mck_enable()
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| H A D | mt8183-dai-i2s.c | 787 int apll; in mtk_dai_i2s_set_sysclk() local
800 apll = mt8183_get_apll_by_rate(afe, freq); in mtk_dai_i2s_set_sysclk()
801 apll_rate = mt8183_get_apll_rate(afe, apll); in mtk_dai_i2s_set_sysclk()
815 i2s_priv->mclk_apll = apll; in mtk_dai_i2s_set_sysclk()
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| /openbmc/linux/sound/soc/mediatek/mt8192/ |
| H A D | mt8192-dai-tdm.c | 489 int apll; in mtk_dai_tdm_cal_mclk() local
492 apll = mt8192_get_apll_by_rate(afe, freq); in mtk_dai_tdm_cal_mclk()
493 apll_rate = mt8192_get_apll_rate(afe, apll); in mtk_dai_tdm_cal_mclk()
508 tdm_priv->mclk_apll = apll; in mtk_dai_tdm_cal_mclk()
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| H A D | mt8192-afe-clk.c | 385 int mt8192_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8192_get_apll_rate() argument
387 return (apll == MT8192_APLL1) ? 180633600 : 196608000; in mt8192_get_apll_rate()
565 int apll = mt8192_get_apll_by_rate(afe, rate); in mt8192_mck_enable() local
566 int apll_clk_id = apll == MT8192_APLL1 ? in mt8192_mck_enable()
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| H A D | mt8192-afe-clk.h | 233 int mt8192_get_apll_rate(struct mtk_base_afe *afe, int apll);
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_zynqmp.c | 114 apll, dpll, vpll, enumerator
186 case apll: in zynqmp_clk_get_register()
258 return apll; in zynqmp_clk_get_cpu_pll()
304 return apll; in zynqmp_clk_get_wdt_pll()
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| /openbmc/linux/sound/soc/mediatek/mt8186/ |
| H A D | mt8186-dai-tdm.c | 339 int apll; in mtk_dai_tdm_cal_mclk() local
342 apll = mt8186_get_apll_by_rate(afe, freq); in mtk_dai_tdm_cal_mclk()
343 apll_rate = mt8186_get_apll_rate(afe, apll); in mtk_dai_tdm_cal_mclk()
358 tdm_priv->mclk_apll = apll; in mtk_dai_tdm_cal_mclk()
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| H A D | mt8186-afe-clk.c | 493 int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll) in mt8186_get_apll_rate() argument
495 return (apll == MT8186_APLL1) ? 180633600 : 196608000; in mt8186_get_apll_rate()
543 int apll = mt8186_get_apll_by_rate(afe, rate); in mt8186_mck_enable() local
544 int apll_clk_id = apll == MT8186_APLL1 ? in mt8186_mck_enable()
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| H A D | mt8186-afe-clk.h | 97 int mt8186_get_apll_rate(struct mtk_base_afe *afe, int apll);
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| H A D | mt8186-dai-i2s.c | 1006 int apll; in mtk_dai_i2s_set_sysclk() local
1016 apll = mt8186_get_apll_by_rate(afe, freq); in mtk_dai_i2s_set_sysclk()
1017 apll_rate = mt8186_get_apll_rate(afe, apll); in mtk_dai_i2s_set_sysclk()
1030 i2s_priv->mclk_apll = apll; in mtk_dai_i2s_set_sysclk()
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 108 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator
736 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
752 #define E5250_CPU_DIV0(apll, pclk_dbg, atb, periph, acp, cpud) \ argument
753 ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
814 exynos5250_plls[apll].rate_table = apll_24mhz_tbl; in exynos5250_clk_init()
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| H A D | clk-exynos5410.c | 64 apll, cpll, epll, mpll, enumerator
243 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
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| H A D | clk-exynos4.c | 150 apll, mpll, epll, vpll, enumerator
1151 [apll] = PLL(pll_4508, CLK_FOUT_APLL, "fout_apll", "fin_pll",
1162 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll",
1196 #define E4210_CPU_DIV0(apll, pclk_dbg, atb, periph, corem1, corem0) \ argument
1197 (((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
1295 exynos4210_plls[apll].rate_table = in exynos4_clk_init()
1309 exynos4x12_plls[apll].rate_table = in exynos4_clk_init()
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| H A D | clk-s5pv210.c | 68 apll, enumerator
716 [apll] = PLL(pll_4508, FOUT_APLL, "fout_apll", "fin_pll",
728 [apll] = PLL(pll_4502, FOUT_APLL, "fout_apll", "fin_pll",
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| H A D | clk-exynos5420.c | 153 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator
1465 [apll] = PLL(pll_2550, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK,
1489 #define E5420_EGL_DIV0(apll, pclk_dbg, atb, cpud) \ argument
1490 ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
1601 exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
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| /openbmc/linux/drivers/clk/ti/ |
| H A D | Makefile | 6 fixed-factor.o mux.o apll.o \
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | ti-phy.txt | 48 * "phy-div" - divider for apll
49 * "div-clk" - apll clock
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| /openbmc/linux/sound/soc/mediatek/mt8195/ |
| H A D | mt8195-afe-clk.h | 101 int mt8195_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll);
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| H A D | mt8195-dai-etdm.c | 1917 int apll; in mtk_dai_etdm_mclk_configure() local
1941 apll = etdm_data->mclk_apll; in mtk_dai_etdm_mclk_configure()
1942 apll_clk_id = mt8195_afe_get_mclk_source_clk_id(apll); in mtk_dai_etdm_mclk_configure()
2156 int apll; in mtk_dai_etdm_cal_mclk() local
2168 apll = mt8195_afe_get_default_mclk_source_by_rate(freq); in mtk_dai_etdm_cal_mclk()
2169 apll_rate = mt8195_afe_get_mclk_source_rate(afe, apll); in mtk_dai_etdm_cal_mclk()
2177 dev_info(afe->dev, "APLL%d cannot generate freq Hz\n", apll); in mtk_dai_etdm_cal_mclk()
2181 etdm_data->mclk_apll = apll; in mtk_dai_etdm_cal_mclk()
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| /openbmc/linux/sound/soc/mediatek/mt8188/ |
| H A D | mt8188-afe-clk.h | 109 int mt8188_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll);
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| H A D | mt8188-dai-etdm.c | 396 int apll; in mtk_dai_etdm_enable_mclk() local
403 apll = etdm_data->mclk_apll; in mtk_dai_etdm_enable_mclk()
404 apll_clk_id = mt8188_afe_get_mclk_source_clk_id(apll); in mtk_dai_etdm_enable_mclk()
2238 int apll; in mtk_dai_etdm_cal_mclk() local
2250 apll = mt8188_afe_get_default_mclk_source_by_rate(freq); in mtk_dai_etdm_cal_mclk()
2252 apll = etdm_data->mclk_apll; in mtk_dai_etdm_cal_mclk()
2254 apll_rate = mt8188_afe_get_mclk_source_rate(afe, apll); in mtk_dai_etdm_cal_mclk()
2262 dev_err(afe->dev, "APLL%d cannot generate freq Hz\n", apll); in mtk_dai_etdm_cal_mclk()
2267 etdm_data->mclk_apll = apll; in mtk_dai_etdm_cal_mclk()
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| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 631 unsigned int apll, dpll, gpll; in rkclk_init() local
649 apll = rkclk_pll_get_rate(cru, CLK_ARM); in rkclk_init()
656 printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll); in rkclk_init()
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