1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4 //
5 // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 // Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 //
8
9 #include <linux/devcoredump.h>
10 #include <linux/slab.h>
11 #include "avs.h"
12 #include "messages.h"
13 #include "path.h"
14 #include "topology.h"
15
16 static int __maybe_unused
apl_enable_logs(struct avs_dev * adev,enum avs_log_enable enable,u32 aging_period,u32 fifo_full_period,unsigned long resource_mask,u32 * priorities)17 apl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,
18 u32 fifo_full_period, unsigned long resource_mask, u32 *priorities)
19 {
20 struct apl_log_state_info *info;
21 u32 size, num_cores = adev->hw_cfg.dsp_cores;
22 int ret, i;
23
24 if (fls_long(resource_mask) > num_cores)
25 return -EINVAL;
26 size = struct_size(info, logs_core, num_cores);
27 info = kzalloc(size, GFP_KERNEL);
28 if (!info)
29 return -ENOMEM;
30
31 info->aging_timer_period = aging_period;
32 info->fifo_full_timer_period = fifo_full_period;
33 info->core_mask = resource_mask;
34 if (enable)
35 for_each_set_bit(i, &resource_mask, num_cores) {
36 info->logs_core[i].enable = enable;
37 info->logs_core[i].min_priority = *priorities++;
38 }
39 else
40 for_each_set_bit(i, &resource_mask, num_cores)
41 info->logs_core[i].enable = enable;
42
43 ret = avs_ipc_set_enable_logs(adev, (u8 *)info, size);
44 kfree(info);
45 if (ret)
46 return AVS_IPC_RET(ret);
47
48 return 0;
49 }
50
apl_log_buffer_status(struct avs_dev * adev,union avs_notify_msg * msg)51 static int apl_log_buffer_status(struct avs_dev *adev, union avs_notify_msg *msg)
52 {
53 struct apl_log_buffer_layout layout;
54 void __iomem *addr, *buf;
55
56 addr = avs_log_buffer_addr(adev, msg->log.core);
57 if (!addr)
58 return -ENXIO;
59
60 memcpy_fromio(&layout, addr, sizeof(layout));
61
62 if (!avs_logging_fw(adev))
63 /* consume the logs regardless of consumer presence */
64 goto update_read_ptr;
65
66 buf = apl_log_payload_addr(addr);
67
68 if (layout.read_ptr > layout.write_ptr) {
69 avs_dump_fw_log(adev, buf + layout.read_ptr,
70 apl_log_payload_size(adev) - layout.read_ptr);
71 layout.read_ptr = 0;
72 }
73 avs_dump_fw_log_wakeup(adev, buf + layout.read_ptr, layout.write_ptr - layout.read_ptr);
74
75 update_read_ptr:
76 writel(layout.write_ptr, addr);
77 return 0;
78 }
79
apl_wait_log_entry(struct avs_dev * adev,u32 core,struct apl_log_buffer_layout * layout)80 static int apl_wait_log_entry(struct avs_dev *adev, u32 core, struct apl_log_buffer_layout *layout)
81 {
82 unsigned long timeout;
83 void __iomem *addr;
84
85 addr = avs_log_buffer_addr(adev, core);
86 if (!addr)
87 return -ENXIO;
88
89 timeout = jiffies + msecs_to_jiffies(10);
90
91 do {
92 memcpy_fromio(layout, addr, sizeof(*layout));
93 if (layout->read_ptr != layout->write_ptr)
94 return 0;
95 usleep_range(500, 1000);
96 } while (!time_after(jiffies, timeout));
97
98 return -ETIMEDOUT;
99 }
100
101 /* reads log header and tests its type */
102 #define apl_is_entry_stackdump(addr) ((readl(addr) >> 30) & 0x1)
103
apl_coredump(struct avs_dev * adev,union avs_notify_msg * msg)104 static int apl_coredump(struct avs_dev *adev, union avs_notify_msg *msg)
105 {
106 struct apl_log_buffer_layout layout;
107 void __iomem *addr, *buf;
108 size_t dump_size;
109 u16 offset = 0;
110 u8 *dump, *pos;
111
112 dump_size = AVS_FW_REGS_SIZE + msg->ext.coredump.stack_dump_size;
113 dump = vzalloc(dump_size);
114 if (!dump)
115 return -ENOMEM;
116
117 memcpy_fromio(dump, avs_sram_addr(adev, AVS_FW_REGS_WINDOW), AVS_FW_REGS_SIZE);
118
119 if (!msg->ext.coredump.stack_dump_size)
120 goto exit;
121
122 /* Dump the registers even if an external error prevents gathering the stack. */
123 addr = avs_log_buffer_addr(adev, msg->ext.coredump.core_id);
124 if (!addr)
125 goto exit;
126
127 buf = apl_log_payload_addr(addr);
128 memcpy_fromio(&layout, addr, sizeof(layout));
129 if (!apl_is_entry_stackdump(buf + layout.read_ptr)) {
130 union avs_notify_msg lbs_msg = AVS_NOTIFICATION(LOG_BUFFER_STATUS);
131
132 /*
133 * DSP awaits the remaining logs to be
134 * gathered before dumping stack
135 */
136 lbs_msg.log.core = msg->ext.coredump.core_id;
137 avs_log_buffer_status_locked(adev, &lbs_msg);
138 }
139
140 pos = dump + AVS_FW_REGS_SIZE;
141 /* gather the stack */
142 do {
143 u32 count;
144
145 if (apl_wait_log_entry(adev, msg->ext.coredump.core_id, &layout))
146 break;
147
148 if (layout.read_ptr > layout.write_ptr) {
149 count = apl_log_payload_size(adev) - layout.read_ptr;
150 memcpy_fromio(pos + offset, buf + layout.read_ptr, count);
151 layout.read_ptr = 0;
152 offset += count;
153 }
154 count = layout.write_ptr - layout.read_ptr;
155 memcpy_fromio(pos + offset, buf + layout.read_ptr, count);
156 offset += count;
157
158 /* update read pointer */
159 writel(layout.write_ptr, addr);
160 } while (offset < msg->ext.coredump.stack_dump_size);
161
162 exit:
163 dev_coredumpv(adev->dev, dump, dump_size, GFP_KERNEL);
164
165 return 0;
166 }
167
apl_lp_streaming(struct avs_dev * adev)168 static bool apl_lp_streaming(struct avs_dev *adev)
169 {
170 struct avs_path *path;
171
172 spin_lock(&adev->path_list_lock);
173 /* Any gateway without buffer allocated in LP area disqualifies D0IX. */
174 list_for_each_entry(path, &adev->path_list, node) {
175 struct avs_path_pipeline *ppl;
176
177 list_for_each_entry(ppl, &path->ppl_list, node) {
178 struct avs_path_module *mod;
179
180 list_for_each_entry(mod, &ppl->mod_list, node) {
181 struct avs_tplg_modcfg_ext *cfg;
182
183 cfg = mod->template->cfg_ext;
184
185 /* only copiers have gateway attributes */
186 if (!guid_equal(&cfg->type, &AVS_COPIER_MOD_UUID))
187 continue;
188 /* non-gateway copiers do not prevent PG */
189 if (cfg->copier.dma_type == INVALID_OBJECT_ID)
190 continue;
191
192 if (!mod->gtw_attrs.lp_buffer_alloc) {
193 spin_unlock(&adev->path_list_lock);
194 return false;
195 }
196 }
197 }
198 }
199 spin_unlock(&adev->path_list_lock);
200
201 return true;
202 }
203
apl_d0ix_toggle(struct avs_dev * adev,struct avs_ipc_msg * tx,bool wake)204 static bool apl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake)
205 {
206 /* wake in all cases */
207 if (wake)
208 return true;
209
210 /*
211 * If no pipelines are running, allow for d0ix schedule.
212 * If all gateways have lp=1, allow for d0ix schedule.
213 * If any gateway with lp=0 is allocated, abort scheduling d0ix.
214 *
215 * Note: for cAVS 1.5+ and 1.8, D0IX is LP-firmware transition,
216 * not the power-gating mechanism known from cAVS 2.0.
217 */
218 return apl_lp_streaming(adev);
219 }
220
apl_set_d0ix(struct avs_dev * adev,bool enable)221 static int apl_set_d0ix(struct avs_dev *adev, bool enable)
222 {
223 bool streaming = false;
224 int ret;
225
226 if (enable)
227 /* Either idle or all gateways with lp=1. */
228 streaming = !list_empty(&adev->path_list);
229
230 ret = avs_ipc_set_d0ix(adev, enable, streaming);
231 return AVS_IPC_RET(ret);
232 }
233
234 const struct avs_dsp_ops apl_dsp_ops = {
235 .power = avs_dsp_core_power,
236 .reset = avs_dsp_core_reset,
237 .stall = avs_dsp_core_stall,
238 .irq_handler = avs_dsp_irq_handler,
239 .irq_thread = avs_dsp_irq_thread,
240 .int_control = avs_dsp_interrupt_control,
241 .load_basefw = avs_hda_load_basefw,
242 .load_lib = avs_hda_load_library,
243 .transfer_mods = avs_hda_transfer_modules,
244 .log_buffer_offset = skl_log_buffer_offset,
245 .log_buffer_status = apl_log_buffer_status,
246 .coredump = apl_coredump,
247 .d0ix_toggle = apl_d0ix_toggle,
248 .set_d0ix = apl_set_d0ix,
249 AVS_SET_ENABLE_LOGS_OP(apl)
250 };
251