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Searched refs:aggl (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_sched.c2300 u8 aggl, vsil, i; in ice_sched_move_vsi_to_agg() local
2319 aggl = ice_sched_get_agg_layer(pi->hw); in ice_sched_move_vsi_to_agg()
2323 for (i = aggl + 1; i < vsil; i++) in ice_sched_move_vsi_to_agg()
2337 for (i = aggl + 1; i < vsil; i++) { in ice_sched_move_vsi_to_agg()
2551 u8 i, aggl; in ice_sched_add_agg_cfg() local
2562 aggl = ice_sched_get_agg_layer(hw); in ice_sched_add_agg_cfg()
2565 num_nodes[aggl] = 1; in ice_sched_add_agg_cfg()
2571 for (i = hw->sw_entry_point_layer; i < aggl; i++) { in ice_sched_add_agg_cfg()
2588 for (i = hw->sw_entry_point_layer; i <= aggl; i++) { in ice_sched_add_agg_cfg()
2606 if (parent && i == aggl) in ice_sched_add_agg_cfg()
H A Dice_lag.c364 u8 aggl, vsil; in ice_lag_get_sched_parent() local
381 aggl = ice_sched_get_agg_layer(hw); in ice_lag_get_sched_parent()
384 for (n = aggl + 1; n < vsil; n++) in ice_lag_get_sched_parent()
396 for (n = aggl + 1; n < vsil; n++) { in ice_lag_get_sched_parent()