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Searched refs:adr (Results 1 – 25 of 50) sorted by relevance

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/openbmc/u-boot/include/linux/mtd/
H A Ddoc2000.h84 #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2… argument
85 #define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d… argument
88 #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1… argument
89 #define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d… argument
92 #define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) argument
93 #define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) argument
103 #define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) argument
104 #define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) argument
/openbmc/u-boot/drivers/power/regulator/
H A Dpalmas_regulator.c53 unsigned int adr; in palmas_smps_enable() local
57 adr = uc_pdata->ctrl_reg; in palmas_smps_enable()
59 ret = pmic_reg_read(dev->parent, adr); in palmas_smps_enable()
78 ret = pmic_reg_write(dev->parent, adr, ret); in palmas_smps_enable()
120 unsigned int hex, adr; in palmas_smps_val() local
130 adr = uc_pdata->volt_reg; in palmas_smps_val()
132 ret = pmic_reg_read(dev->parent, adr); in palmas_smps_val()
160 return pmic_reg_write(dev->parent, adr, ret); in palmas_smps_val()
167 unsigned int adr; in palmas_ldo_bypass_enable() local
181 adr = p->ctrl_reg; in palmas_ldo_bypass_enable()
[all …]
H A Dlp873x_regulator.c26 unsigned int adr; in lp873x_buck_enable() local
30 adr = uc_pdata->ctrl_reg; in lp873x_buck_enable()
32 ret = pmic_reg_read(dev->parent, adr); in lp873x_buck_enable()
50 ret = pmic_reg_write(dev->parent, adr, ret); in lp873x_buck_enable()
88 unsigned int hex, adr; in lp873x_buck_val() local
97 adr = uc_pdata->volt_reg; in lp873x_buck_val()
99 ret = pmic_reg_read(dev->parent, adr); in lp873x_buck_val()
120 ret = pmic_reg_write(dev->parent, adr, ret); in lp873x_buck_val()
128 unsigned int adr; in lp873x_ldo_enable() local
132 adr = uc_pdata->ctrl_reg; in lp873x_ldo_enable()
[all …]
H A Dlp87565_regulator.c24 unsigned int adr; in lp87565_buck_enable() local
28 adr = uc_pdata->ctrl_reg; in lp87565_buck_enable()
30 ret = pmic_reg_read(dev->parent, adr); in lp87565_buck_enable()
48 ret = pmic_reg_write(dev->parent, adr, ret); in lp87565_buck_enable()
86 unsigned int hex, adr; in lp87565_buck_val() local
95 adr = uc_pdata->volt_reg; in lp87565_buck_val()
97 ret = pmic_reg_read(dev->parent, adr); in lp87565_buck_val()
118 ret = pmic_reg_write(dev->parent, adr, ret); in lp87565_buck_val()
H A Dmax77686.c319 unsigned int adr; in max77686_ldo_val() local
332 adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1; in max77686_ldo_val()
334 ret = pmic_read(dev->parent, adr, &val, 1); in max77686_ldo_val()
353 ret = pmic_write(dev->parent, adr, &val, 1); in max77686_ldo_val()
360 unsigned int mask, adr; in max77686_buck_val() local
374 adr = max77686_buck_out[buck]; in max77686_buck_val()
388 ret = pmic_read(dev->parent, adr, &val, 1); in max77686_buck_val()
407 ret = pmic_write(dev->parent, adr, &val, 1); in max77686_buck_val()
414 unsigned int adr, mode; in max77686_ldo_mode() local
427 adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1; in max77686_ldo_mode()
[all …]
/openbmc/qemu/hw/audio/
H A Dgusemu_mixer.c88 int8_t *adr; in gus_mixvoices() local
89 adr = (int8_t *) state->himemaddr + offset; in gus_mixvoices()
90 sample1 = (*adr & 0xff) + (*(adr + 1) * 256); in gus_mixvoices()
91 sample2 = (*(adr + 2) & 0xff) + (*(adr + 2 + 1) * 256); in gus_mixvoices()
96 int8_t *adr; in gus_mixvoices() local
97 adr = (int8_t *) state->himemaddr + offset; in gus_mixvoices()
98 sample1 = (*adr) * 256; in gus_mixvoices()
99 sample2 = (*(adr + 1)) * 256; in gus_mixvoices()
H A Dgusemu_hal.c181 uint8_t *adr; in gus_read() local
182 adr = state->himemaddr + (GUSregd(GUSDRAMPOS24bit) & 0xfffff); in gus_read()
183 return *adr; in gus_read()
475 uint8_t *adr; in gus_write() local
476 adr = state->himemaddr + (GUSregd(GUSDRAMPOS24bit) & 0xfffff); in gus_write()
477 *adr = (uint8_t) data; in gus_write()
/openbmc/qemu/tests/tcg/aarch64/system/
H A Dboot.S74 adr x1, .unexp_excp
116 adr x1, .get_cmd
130 adr x1, .high_el_msg
154 adr x1, .unexp_el0
159 adr x0, vector_table
186 adr x0, setup_el2
197 adr x0, at_testel
209 adr x0, vector_table
225 adr x0, at_testel
242 adr x0, vector_table
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/openbmc/u-boot/arch/arm/lib/
H A Drelocate_64.S29 adr x1, __image_copy_start /* x1 <- Run &__image_copy_start */
45 adr x1, __image_copy_start /* x1 <- Run &__image_copy_start */
46 adr x2, __image_copy_end /* x2 <- Run &__image_copy_end */
57 adr x2, __rel_dyn_start /* x2 <- Run &__rel_dyn_start */
58 adr x3, __rel_dyn_end /* x3 <- Run &__rel_dyn_end */
H A Dcrt0_64.S76 adr x0, __bss_start
102 adr lr, relocation_return
105 adr x0, _start /* x0 <- Runtime value of _start */
H A Dcrt0_arm_efi.S122 adr r1, .L_DYNAMIC
125 adr r0, image_base
/openbmc/qemu/hw/i2c/
H A Dmpc_i2c.c80 uint8_t adr; member
118 i2c->adr = 0x00; in mpc_i2c_reset()
144 uint8_t adr = s->adr; in mpc_i2c_soft_reset() local
146 s->adr = adr; in mpc_i2c_soft_reset()
200 value = s->adr; in mpc_i2c_read()
241 s->adr = value & CADR_MASK; in mpc_i2c_write()
317 VMSTATE_UINT8(adr, MPCI2CState),
/openbmc/u-boot/drivers/net/
H A Dmvgbe.h36 #define MVGBE_REG_WR(adr, val) writel(val, &adr) argument
37 #define MVGBE_REG_RD(adr) readl(&adr) argument
38 #define MVGBE_REG_BITS_RESET(adr, val) writel(readl(&adr) & ~(val), &adr) argument
39 #define MVGBE_REG_BITS_SET(adr, val) writel(readl(&adr) | val, &adr) argument
/openbmc/u-boot/arch/arm/mach-omap2/omap3/
H A Dlowlevel_init.S47 adr r0, go_to_speed /* copy from start of go_to_speed... */
48 adr r2, lowlevel_init /* ... up to start of low_level_init */
251 adr r0, mpu_dpll_param
298 adr r0, iva_dpll_param
345 adr r0, core_dpll_param
367 adr r0, per_dpll_param
389 adr r0, per2_dpll_param
454 adr r0, mpu_36x_dpll_param
459 adr r0, iva_36x_dpll_param
464 adr r0, core_36x_dpll_param
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dsec_boot.S12 adr r0, code_base @ r0: source address (start)
13 adr r1, code_end @ r1: source address (end)
98 adr r0, _cpu_state
118 adr r0, _hotplug_addr
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dmx7_plugin.S49 adr r0, boot_data2
50 adr r1, image_len2
51 adr r2, boot_data2
/openbmc/u-boot/arch/arm/cpu/armv8/
H A Dstart.S67 adr x0, _start /* x0 <- Runtime value of _start */
70 adr x2, __rel_dyn_start /* x2 <- Runtime &__rel_dyn_start */
71 adr x3, __rel_dyn_end /* x3 <- Runtime &__rel_dyn_end */
95 adr x0, vectors
325 adr x4, lowlevel_in_el2
331 adr x4, lowlevel_in_el1
359 adr x0, vectors
/openbmc/u-boot/board/nokia/rx51/
H A Dlowlevel_init.S45 adr r0, relocaddr /* r0 - address of section relocaddr */
94 adr r0, relocaddr /* r0 - address of section relocaddr */
141 adr r3, end
144 adr r4, copy_uboot_start
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dlowlevel_init.S33 adr r0, save_sp
35 adr r1, restore_from_hyp
39 adr r0, save_sp
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dmx6_plugin.S40 adr r0, boot_data2
41 adr r1, image_len2
42 adr r2, boot_data2
/openbmc/u-boot/arch/arm/mach-rmobile/
H A Dlowlevel_init_gen3.S63 adr x4, lowlevel_in_el2
69 adr x4, lowlevel_in_el1
/openbmc/u-boot/cmd/aspeed/nettest/
H A Dmac.c1416 uint32_t adr; in setup_buf() local
1443 for (adr = (adr_srt + 12); in setup_buf()
1444 adr < (adr_srt + DMA_PakSize); adr += 4) { in setup_buf()
1453 Write_Mem_Dat_DD(adr, gdata); in setup_buf()
1514 for ( adr = adr_srt; adr < adr_end; adr += 4 ) { in setup_buf()
1517 if ( cnt == 1 ) Write_Mem_Dat_DD( adr, SelectSimpleDA_Dat0 ); in setup_buf()
1518 else if ( cnt == 2 ) Write_Mem_Dat_DD( adr, SelectSimpleDA_Dat1 ); in setup_buf()
1519 else if ( cnt == 3 ) Write_Mem_Dat_DD( adr, SelectSimpleDA_Dat2 ); in setup_buf()
1520 else if ( cnt == 4 ) Write_Mem_Dat_DD( adr, len | (len << 16) ); in setup_buf()
1523 Write_Mem_Dat_DD( adr, gdata ); in setup_buf()
[all …]
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dlowlevel_init.S20 adr x0, rom_pointer
44 adr x0, rom_pointer
/openbmc/u-boot/board/qualcomm/dragonboard410c/
H A Dlowlevel_init.S23 adr x8, fw_dtb
/openbmc/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_ll.S17 adr x8, nvtboot_boot_x0

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