/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/acr/ |
H A D | base.c | 101 ret = acr->func->init(acr); in nvkm_acr_load() 137 struct nvkm_acr *acr = device->acr; in nvkm_acr_bootstrap_falcons() local 174 struct nvkm_acr *acr = device->acr; in nvkm_acr_managed_falcon() local 283 if (!acr->wpr_fw || acr->wpr_comp) in nvkm_acr_oneinit() 297 acr->wpr_start, acr->wpr_end, acr->shadow_start); in nvkm_acr_oneinit() 301 if (acr->wpr_fw && !acr->wpr_comp) in nvkm_acr_oneinit() 302 nvkm_wobj(acr->wpr, 0, acr->wpr_fw->data, acr->wpr_fw->size); in nvkm_acr_oneinit() 304 if (!acr->wpr_fw || acr->wpr_comp) in nvkm_acr_oneinit() 305 acr->func->wpr_build(acr, rtos); in nvkm_acr_oneinit() 306 acr->func->wpr_patch(acr, (s64)acr->wpr_start - acr->wpr_prev); in nvkm_acr_oneinit() [all …]
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H A D | gp102.c | 42 wpr_header_v1_dump(&acr->subdev, &hdr); in gp102_acr_wpr_patch() 49 lsb_header_v1_dump(&acr->subdev, &lsb); in gp102_acr_wpr_patch() 105 nvkm_wobj(acr->wpr, lsfw->offset.img, in gp102_acr_wpr_build() 123 &acr->wpr); in gp102_acr_wpr_alloc() 127 acr->shadow_start = nvkm_memory_addr(acr->wpr); in gp102_acr_wpr_alloc() 128 acr->wpr_start = acr->shadow_start + (nvkm_memory_size(acr->wpr) >> 1); in gp102_acr_wpr_alloc() 129 acr->wpr_end = acr->wpr_start + (nvkm_memory_size(acr->wpr) >> 1); in gp102_acr_wpr_alloc() 134 gp102_acr_wpr_layout(struct nvkm_acr *acr) in gp102_acr_wpr_layout() argument 163 gp102_acr_wpr_parse(struct nvkm_acr *acr) in gp102_acr_wpr_parse() argument 169 wpr_header_v1_dump(&acr->subdev, hdr); in gp102_acr_wpr_parse() [all …]
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H A D | gm200.c | 47 gm200_acr_init(struct nvkm_acr *acr) in gm200_acr_init() argument 49 return nvkm_acr_hsfw_boot(acr, "load"); in gm200_acr_init() 67 struct nvkm_subdev *subdev = &acr->subdev; in gm200_acr_wpr_patch() 155 nvkm_wobj(acr->wpr, lsfw->offset.img, in gm200_acr_wpr_build() 173 &acr->wpr); in gm200_acr_wpr_alloc() 177 acr->wpr_start = nvkm_memory_addr(acr->wpr); in gm200_acr_wpr_alloc() 178 acr->wpr_end = acr->wpr_start + nvkm_memory_size(acr->wpr); in gm200_acr_wpr_alloc() 215 wpr_header_dump(&acr->subdev, hdr); in gm200_acr_wpr_parse() 256 list_add_tail(&hsfw->head, &acr->hsfw); in gm200_acr_hsfw_ctor() 285 struct nvkm_acr *acr = fw->falcon->owner->device->acr; in gm200_acr_load_setup() local [all …]
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H A D | gm20b.c | 33 gm20b_acr_wpr_alloc(struct nvkm_acr *acr, u32 wpr_size) in gm20b_acr_wpr_alloc() argument 35 struct nvkm_subdev *subdev = &acr->subdev; in gm20b_acr_wpr_alloc() 37 acr->func->wpr_check(acr, &acr->wpr_start, &acr->wpr_end); in gm20b_acr_wpr_alloc() 39 if ((acr->wpr_end - acr->wpr_start) < wpr_size) { in gm20b_acr_wpr_alloc() 45 wpr_size, 0, true, &acr->wpr); in gm20b_acr_wpr_alloc() 73 struct nvkm_acr *acr = fw->falcon->owner->device->acr; in gm20b_acr_load_setup() local 75 desc->ucode_blob_base = nvkm_memory_addr(acr->wpr); in gm20b_acr_load_setup() 76 desc->ucode_blob_size = nvkm_memory_size(acr->wpr); in gm20b_acr_load_setup() 77 flcn_acr_desc_dump(&acr->subdev, desc); in gm20b_acr_load_setup() 117 struct nvkm_subdev *subdev = &acr->subdev; in gm20b_acr_load() [all …]
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H A D | ga102.c | 40 wpr_header_v2_dump(&acr->subdev, &hdr); in ga102_acr_wpr_patch() 47 lsb_header_v2_dump(&acr->subdev, lsb); in ga102_acr_wpr_patch() 141 nvkm_wo32(acr->wpr, 0x304, 0x14); in ga102_acr_wpr_build() 142 nvkm_wo32(acr->wpr, 0x308, 0xffffffff); in ga102_acr_wpr_build() 143 nvkm_wo32(acr->wpr, 0x30c, 0); in ga102_acr_wpr_build() 144 nvkm_wo32(acr->wpr, 0x310, 0); in ga102_acr_wpr_build() 165 ret = ga102_acr_wpr_build_lsb(acr, lsfw); in ga102_acr_wpr_build() 170 nvkm_wobj(acr->wpr, lsfw->offset.img, in ga102_acr_wpr_build() 188 ga102_acr_wpr_layout(struct nvkm_acr *acr) in ga102_acr_wpr_layout() argument 217 ga102_acr_wpr_parse(struct nvkm_acr *acr) in ga102_acr_wpr_parse() argument [all …]
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H A D | tu102.c | 33 tu102_acr_init(struct nvkm_acr *acr) in tu102_acr_init() argument 35 int ret = nvkm_acr_hsfw_boot(acr, "AHESASC"); in tu102_acr_init() 39 return nvkm_acr_hsfw_boot(acr, "ASB"); in tu102_acr_init() 50 nvkm_wo32(acr->wpr, 0x200, 0xffffffff); in tu102_acr_wpr_build() 53 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build() 65 nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr)); in tu102_acr_wpr_build() 69 ret = gp102_acr_wpr_build_lsb(acr, lsfw); in tu102_acr_wpr_build() 74 nvkm_wobj(acr->wpr, lsfw->offset.img, in tu102_acr_wpr_build() 170 struct nvkm_subdev *subdev = &acr->subdev; in tu102_acr_load() 174 acr, "acr/bl", "acr/ucode_ahesasc", in tu102_acr_load() [all …]
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H A D | Kbuild | 2 nvkm-y += nvkm/subdev/acr/base.o 3 nvkm-y += nvkm/subdev/acr/lsfw.o 4 nvkm-y += nvkm/subdev/acr/gm200.o 5 nvkm-y += nvkm/subdev/acr/gm20b.o 6 nvkm-y += nvkm/subdev/acr/gp102.o 7 nvkm-y += nvkm/subdev/acr/gp108.o 8 nvkm-y += nvkm/subdev/acr/gv100.o 9 nvkm-y += nvkm/subdev/acr/gp10b.o 10 nvkm-y += nvkm/subdev/acr/tu102.o 11 nvkm-y += nvkm/subdev/acr/ga100.o [all …]
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H A D | ga100.c | 25 ga100_acr_wpr_check(struct nvkm_acr *acr, u64 *start, u64 *limit) in ga100_acr_wpr_check() argument 27 struct nvkm_device *device = acr->subdev.device; in ga100_acr_wpr_check() 35 ga100_acr_hsfw_ctor(struct nvkm_acr *acr, const char *bl, const char *fw, in ga100_acr_hsfw_ctor() argument 46 list_add_tail(&hsfw->head, &acr->hsfw); in ga100_acr_hsfw_ctor() 48 return nvkm_falcon_fw_ctor_hs_v2(fwif->func, name, &acr->subdev, fw, ver, NULL, &hsfw->fw); in ga100_acr_hsfw_ctor()
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H A D | lsfw.c | 39 nvkm_acr_lsfw_del_all(struct nvkm_acr *acr) in nvkm_acr_lsfw_del_all() argument 42 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_lsfw_del_all() 48 nvkm_acr_lsfw_get(struct nvkm_acr *acr, enum nvkm_acr_lsf_id id) in nvkm_acr_lsfw_get() argument 51 list_for_each_entry(lsfw, &acr->lsfw, head) { in nvkm_acr_lsfw_get() 64 if (!acr || list_empty(&acr->hsfw)) in nvkm_acr_lsfw_add() 67 lsfw = nvkm_acr_lsfw_get(acr, id); in nvkm_acr_lsfw_add() 69 nvkm_error(&acr->subdev, "LSFW %d redefined\n", id); in nvkm_acr_lsfw_add() 78 list_add_tail(&lsfw->head, &acr->lsfw); in nvkm_acr_lsfw_add() 94 struct nvkm_acr *acr = subdev->device->acr; in nvkm_acr_lsfw_load_sig_image_desc_() local 256 struct nvkm_acr *acr = subdev->device->acr; in nvkm_acr_lsfw_load_bl_inst_data_sig() local [all …]
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/openbmc/qemu/tests/tcg/cris/bare/ |
H A D | check_addiv32.s | 16 addi r6.b,r5,acr 18 move.d [acr],r3 24 addi r8.w,r5,acr 26 move.d [acr],r3 31 addi r10.b,acr,acr 33 move.d [acr],r3 42 movu.w [acr],r3 46 addi r11.w,acr,acr 47 move.d [acr],r3 51 addi r9.d,acr,acr [all …]
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | omap-smp.c | 77 u32 acr, revidr; in omap5_erratum_workaround_801819() local 85 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in omap5_erratum_workaround_801819() 94 if ((acr & acr_mask) == acr_mask) in omap5_erratum_workaround_801819() 97 acr |= acr_mask; in omap5_erratum_workaround_801819() 98 omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr); in omap5_erratum_workaround_801819() 123 u32 acr, acr_mask; in omap5_secondary_harden_predictor() local 125 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in omap5_secondary_harden_predictor() 133 if ((acr & acr_mask) == acr_mask) in omap5_secondary_harden_predictor() 136 acr |= acr_mask; in omap5_secondary_harden_predictor() 137 omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr); in omap5_secondary_harden_predictor()
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H A D | omap-secure.c | 192 u32 acr; in rx51_secure_update_aux_cr() local 195 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in rx51_secure_update_aux_cr() 196 acr &= ~clear_bits; in rx51_secure_update_aux_cr() 197 acr |= set_bits; in rx51_secure_update_aux_cr() 202 1, acr, 0, 0, 0); in rx51_secure_update_aux_cr()
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/openbmc/u-boot/arch/arm/mach-omap2/omap3/ |
H A D | board.c | 367 void __weak omap3_set_aux_cr_secure(u32 acr) in omap3_set_aux_cr_secure() argument 372 emu_romcode_params.param1 = acr; in omap3_set_aux_cr_secure() 387 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, in v7_arch_cp15_set_acr() argument 392 omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_ACR, acr); in v7_arch_cp15_set_acr() 394 omap3_set_aux_cr_secure(acr); in v7_arch_cp15_set_acr() 397 asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr)); in v7_arch_cp15_set_acr() 404 u32 acr; in omap3_update_aux_cr() local 407 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in omap3_update_aux_cr() 408 acr &= ~clear_bits; in omap3_update_aux_cr() 409 acr |= set_bits; in omap3_update_aux_cr() [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
H A D | gp108.c | 29 gp108_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gp108_gr_acr_bld_patch() argument 32 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp108_gr_acr_bld_patch() 35 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp108_gr_acr_bld_patch() 36 flcn_bl_dmem_desc_v2_dump(&acr->subdev, &hdr); in gp108_gr_acr_bld_patch() 40 gp108_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gp108_gr_acr_bld_write() argument 56 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp108_gr_acr_bld_write()
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H A D | gm20b.c | 34 gm20b_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gm20b_gr_acr_bld_patch() argument 39 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_gr_acr_bld_patch() 46 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_gr_acr_bld_patch() 48 flcn_bl_dmem_desc_dump(&acr->subdev, &hdr); in gm20b_gr_acr_bld_patch() 52 gm20b_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gm20b_gr_acr_bld_write() argument 70 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_gr_acr_bld_write() 87 if (!device->acr) { in gm20b_gr_init_gpc_mmu()
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H A D | gm200.c | 46 gm200_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gm200_gr_acr_bld_patch() argument 49 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm200_gr_acr_bld_patch() 52 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm200_gr_acr_bld_patch() 53 flcn_bl_dmem_desc_v1_dump(&acr->subdev, &hdr); in gm200_gr_acr_bld_patch() 57 gm200_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gm200_gr_acr_bld_write() argument 73 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm200_gr_acr_bld_write()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
H A D | gp102.c | 81 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch() 85 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch() 86 loader_config_v1_dump(&acr->subdev, &hdr); in gp102_sec2_acr_bld_patch() 90 gp102_sec2_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gp102_sec2_acr_bld_write() argument 107 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_write() 244 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch_1() 247 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_patch_1() 248 flcn_bl_dmem_desc_v2_dump(&acr->subdev, &hdr); in gp102_sec2_acr_bld_patch_1() 252 gp102_sec2_acr_bld_write_1(struct nvkm_acr *acr, u32 bld, in gp102_sec2_acr_bld_write_1() argument 268 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gp102_sec2_acr_bld_write_1() [all …]
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/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/ |
H A D | spl_minimal.c | 29 im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | in cpu_init_f() 35 im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) | in cpu_init_f()
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/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | dce3_1_afmt.c | 171 const struct radeon_hdmi_acr *acr) in dce3_2_hdmi_update_acr() argument 181 HDMI0_ACR_CTS_32(acr->cts_32khz), in dce3_2_hdmi_update_acr() 184 HDMI0_ACR_N_32(acr->n_32khz), in dce3_2_hdmi_update_acr() 188 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in dce3_2_hdmi_update_acr() 191 HDMI0_ACR_N_44(acr->n_44_1khz), in dce3_2_hdmi_update_acr() 195 HDMI0_ACR_CTS_48(acr->cts_48khz), in dce3_2_hdmi_update_acr() 198 HDMI0_ACR_N_48(acr->n_48khz), in dce3_2_hdmi_update_acr()
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/openbmc/linux/sound/soc/sh/ |
H A D | dma-sh7760.c | 214 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_play_dma_start() local 216 BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; in dmabrg_play_dma_start() 221 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_play_dma_stop() local 223 BRGREG(BRGACR) = acr | ACR_TDS; in dmabrg_play_dma_stop() 228 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_rec_dma_start() local 230 BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; in dmabrg_rec_dma_start() 235 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_rec_dma_stop() local 237 BRGREG(BRGACR) = acr | ACR_RDS; in dmabrg_rec_dma_stop()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
H A D | gm20b.c | 66 gm20b_pmu_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust) in gm20b_pmu_acr_bld_patch() argument 71 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_pmu_acr_bld_patch() 81 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_pmu_acr_bld_patch() 83 loader_config_dump(&acr->subdev, &hdr); in gm20b_pmu_acr_bld_patch() 87 gm20b_pmu_acr_bld_write(struct nvkm_acr *acr, u32 bld, in gm20b_pmu_acr_bld_write() argument 109 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr)); in gm20b_pmu_acr_bld_write() 255 ver, fwif->acr); in gm20b_pmu_load()
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/openbmc/qemu/hw/net/can/ |
H A D | can_sja1000.c | 87 filter->can_id = (uint32_t)acr[0] << 21; in can_sja_single_filter() 88 filter->can_id |= (uint32_t)acr[1] << 13; in can_sja_single_filter() 89 filter->can_id |= (uint32_t)acr[2] << 5; in can_sja_single_filter() 90 filter->can_id |= (uint32_t)acr[3] >> 3; in can_sja_single_filter() 91 if (acr[3] & 4) { in can_sja_single_filter() 104 filter->can_id = (uint32_t)acr[0] << 3; in can_sja_single_filter() 105 filter->can_id |= (uint32_t)acr[1] >> 5; in can_sja_single_filter() 106 if (acr[1] & 0x10) { in can_sja_single_filter() 124 filter->can_id = (uint32_t)acr[0] << 21; in can_sja_dual_filter() 131 filter->can_id = (uint32_t)acr[0] << 3; in can_sja_dual_filter() [all …]
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/openbmc/u-boot/arch/arm/cpu/armv7/ |
H A D | cp15.c | 24 void __weak v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, in v7_arch_cp15_set_acr() argument 27 asm volatile ("mcr p15, 0, %0, c1, c0, 1\n\t" : : "r"(acr)); in v7_arch_cp15_set_acr()
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/openbmc/u-boot/board/nokia/rx51/ |
H A D | rx51.c | 343 void omap3_set_aux_cr_secure(u32 acr) in omap3_set_aux_cr_secure() argument 348 emu_romcode_params.param1 = acr; in omap3_set_aux_cr_secure() 363 u32 acr; in omap3_update_aux_cr_secure_rx51() local 366 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in omap3_update_aux_cr_secure_rx51() 367 acr &= ~clear_bits; in omap3_update_aux_cr_secure_rx51() 368 acr |= set_bits; in omap3_update_aux_cr_secure_rx51() 369 omap3_set_aux_cr_secure(acr); in omap3_update_aux_cr_secure_rx51()
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/openbmc/linux/sound/aoa/codecs/ |
H A D | tas.c | 92 u8 acr; member 504 oldacr = tas->acr; in tas_snd_capture_source_put() 513 tas->acr |= TAS_ACR_INPUT_B | TAS_ACR_B_MONAUREAL | in tas_snd_capture_source_put() 515 if (oldacr == tas->acr) { in tas_snd_capture_source_put() 520 tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr); in tas_snd_capture_source_put() 688 tas->acr |= TAS_ACR_ANALOG_PDOWN; in tas_reset_init() 689 if (tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr)) in tas_reset_init() 704 tas->acr &= ~TAS_ACR_ANALOG_PDOWN; in tas_reset_init() 705 if (tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr)) in tas_reset_init() 748 tas->acr |= TAS_ACR_ANALOG_PDOWN; in tas_suspend() [all …]
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