/openbmc/qemu/target/ppc/ |
H A D | mmu-radix64.c | 88 switch (access_type) { in ppc_radix64_raise_segi() 118 __func__, access_str(access_type), in ppc_radix64_raise_si() 121 switch (access_type) { in ppc_radix64_raise_si() 151 env->error_code = access_type; in ppc_radix64_raise_hsi() 152 access_type = MMU_DATA_LOAD; in ppc_radix64_raise_hsi() 157 __func__, access_str(access_type), in ppc_radix64_raise_hsi() 160 switch (access_type) { in ppc_radix64_raise_hsi() 212 need_prot = prot_for_access_type(access_type); in ppc_radix64_check_prot() 224 switch (access_type) { in ppc_radix64_check_rc() 384 MMUAccessType access_type = orig_access_type; in ppc_radix64_partition_scoped_xlate() local [all …]
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H A D | mmu_common.c | 156 ret = check_prot(ctx->prot, access_type); in ppc6xx_tlb_pte_check() 298 bool ifetch = access_type == MMU_INST_FETCH; in get_bat_6xx_tlb() 644 if ((access_type == MMU_INST_FETCH ? in mmubooke_check_tlb() 658 return access_type == MMU_INST_FETCH ? -3 : -2; in mmubooke_check_tlb() 674 access_type, i); in mmubooke_get_physical_address() 753 if (access_type == MMU_DATA_STORE) { in mmubooke206_esr() 855 if (access_type == MMU_INST_FETCH) { in mmubooke206_check_tlb() 873 return access_type == MMU_INST_FETCH ? -3 : -2; in mmubooke206_check_tlb() 1253 if (access_type == MMU_INST_FETCH) { in booke206_update_mas_tlb_miss() 1312 if (access_type == MMU_INST_FETCH) { in ppc_jumbo_xlate() [all …]
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H A D | mmu-hash32.c | 134 bool ifetch = access_type == MMU_INST_FETCH; in ppc_hash32_bat_lookup() 202 if (access_type == MMU_INST_FETCH) { in ppc_hash32_direct_store() 229 if (access_type == MMU_DATA_STORE) { in ppc_hash32_direct_store() 249 if (access_type == MMU_DATA_STORE) { in ppc_hash32_direct_store() 260 if (*prot & prot_for_access_type(access_type)) { in ppc_hash32_direct_store() 269 if (access_type == MMU_DATA_STORE) { in ppc_hash32_direct_store() 408 need_prot = prot_for_access_type(access_type); in ppc_hash32_xlate() 459 if (access_type == MMU_INST_FETCH) { in ppc_hash32_xlate() 466 if (access_type == MMU_DATA_STORE) { in ppc_hash32_xlate() 486 if (access_type == MMU_INST_FETCH) { in ppc_hash32_xlate() [all …]
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H A D | user_only_helper.c | 27 MMUAccessType access_type, in ppc_cpu_record_sigsegv() argument 41 if (access_type == MMU_INST_FETCH) { in ppc_cpu_record_sigsegv() 47 if (access_type == MMU_DATA_STORE) { in ppc_cpu_record_sigsegv()
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H A D | internal.h | 241 static inline int prot_for_access_type(MMUAccessType access_type) in prot_for_access_type() argument 243 switch (access_type) { in prot_for_access_type() 260 bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, 265 MMUAccessType access_type, int type, 299 MMUAccessType access_type, 303 MMUAccessType access_type, int mmu_idx, 306 MMUAccessType access_type, int mmu_idx, 310 MMUAccessType access_type,
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/openbmc/qemu/target/mips/sysemu/ |
H A D | physaddr.c | 79 MMUAccessType access_type, int mmu_idx, in get_seg_physical_address() argument 92 access_type); in get_seg_physical_address() 117 MMUAccessType access_type, int mmu_idx) in get_physical_address() argument 142 real_address, access_type, in get_physical_address() 149 real_address, access_type); in get_physical_address() 158 real_address, access_type); in get_physical_address() 199 real_address, access_type); in get_physical_address() 207 access_type, mmu_idx, in get_physical_address() 212 access_type, mmu_idx, in get_physical_address() 217 access_type, mmu_idx, in get_physical_address() [all …]
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/openbmc/qemu/target/arm/tcg/ |
H A D | tlb_helper.c | 164 MMUAccessType access_type, in arm_deliver_fault() argument 179 access_type == MMU_INST_FETCH, in arm_deliver_fault() 181 access_type == MMU_DATA_STORE, fsc); in arm_deliver_fault() 222 if (access_type == MMU_INST_FETCH) { in arm_deliver_fault() 229 if (access_type == MMU_DATA_STORE in arm_deliver_fault() 244 MMUAccessType access_type, in arm_cpu_do_unaligned_access() argument 254 arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi); in arm_cpu_do_unaligned_access() 283 MMUAccessType access_type, in arm_cpu_do_transaction_failed() argument 295 arm_deliver_fault(cpu, addr, access_type, mmu_idx, &fi); in arm_cpu_do_transaction_failed() 324 ret = get_phys_addr(&cpu->env, address, access_type, in arm_cpu_tlb_fill() [all …]
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/openbmc/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training.c | 399 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 405 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 426 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 439 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 443 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 449 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 586 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 603 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 656 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() 659 (dev_num, access_type, if_id, in hws_ddr3_tip_init_controller() [all …]
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H A D | ddr3_training_bist.c | 13 enum hws_access_type access_type, 21 enum hws_access_type access_type, u32 if_num, in ddr3_tip_bist_activate() argument 34 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, in ddr3_tip_bist_activate() 39 ddr3_tip_if_write(0, access_type, 0, ODPG_DATA_CTRL_REG, in ddr3_tip_bist_activate() 51 ddr3_tip_configure_odpg(0, access_type, 0, dir, in ddr3_tip_bist_activate() 59 ddr3_tip_bist_operation(0, access_type, 0, BIST_STOP); in ddr3_tip_bist_activate() 61 ddr3_tip_bist_operation(0, access_type, 0, BIST_START); in ddr3_tip_bist_activate() 64 ddr3_tip_bist_operation(0, access_type, 0, BIST_STOP); in ddr3_tip_bist_activate() 168 enum hws_access_type access_type, in ddr3_tip_bist_operation() argument 427 ddr3_tip_bist_operation(0, access_type, 0, BIST_START); in mv_ddr_bist_tx() [all …]
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H A D | ddr3_training_ip_engine.c | 414 (dev_num, access_type, interface_num, in ddr3_tip_ip_training() 437 (dev_num, access_type, interface_num, in ddr3_tip_ip_training() 514 (dev_num, access_type, in ddr3_tip_ip_training() 584 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 590 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 597 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 603 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 610 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 616 (dev_num, access_type, if_id, in ddr3_tip_load_pattern_to_odpg() 956 enum hws_access_type access_type, in ddr3_tip_ip_training_wrapper_int() argument [all …]
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/openbmc/linux/kernel/kcsan/ |
H A D | report.c | 32 int access_type; member 433 get_bug_type(ai->access_type | other_info->ai.access_type), in print_report() 437 pr_err("BUG: KCSAN: %s in %pS\n", get_bug_type(ai->access_type), in print_report() 446 get_access_type(other_info->ai.access_type), other_info->ai.ptr, in print_report() 459 get_access_type(ai->access_type), ai->ptr, ai->size, in print_report() 463 get_access_type(ai->access_type), ai->ptr, ai->size, in print_report() 638 int access_type, unsigned long ip) in prepare_access_info() argument 643 .access_type = access_type, in prepare_access_info() 647 .ip = (access_type & KCSAN_ACCESS_SCOPED) ? ip : 0, in prepare_access_info() 654 const struct access_info ai = prepare_access_info(ptr, size, access_type, ip); in kcsan_report_set_info() [all …]
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H A D | kcsan.h | 123 void kcsan_report_set_info(const volatile void *ptr, size_t size, int access_type, 131 void kcsan_report_known_origin(const volatile void *ptr, size_t size, int access_type, 139 void kcsan_report_unknown_origin(const volatile void *ptr, size_t size, int access_type,
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/openbmc/qemu/target/i386/tcg/sysemu/ |
H A D | excp_helper.c | 32 MMUAccessType access_type; member 140 const MMUAccessType access_type = in->access_type; in mmu_translate() local 388 if ((pkr_prot & (1 << access_type)) == 0) { in mmu_translate() 394 if ((prot & (1 << access_type)) == 0) { in mmu_translate() 401 if (access_type == MMU_DATA_STORE) { in mmu_translate() 430 flags = probe_access_full(env, paddr, 0, access_type, in mmu_translate() 446 if ((prot & (1 << access_type)) == 0) { in mmu_translate() 476 assert(access_type != MMU_INST_FETCH); in mmu_translate() 485 switch (access_type) { in mmu_translate() 535 in.access_type = access_type; in get_physical_address() [all …]
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/openbmc/qemu/target/i386/tcg/user/ |
H A D | excp_helper.c | 26 MMUAccessType access_type, in x86_cpu_record_sigsegv() argument 40 env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT) in x86_cpu_record_sigsegv() 53 MMUAccessType access_type, uintptr_t ra) in x86_cpu_record_sigbus() argument 56 handle_unaligned_access(&cpu->env, addr, access_type, ra); in x86_cpu_record_sigbus()
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/ |
H A D | sdk.c | 125 void *buf, enum mlx5_fpga_access_type access_type) in mlx5_fpga_mem_read() argument 129 switch (access_type) { in mlx5_fpga_mem_read() 137 access_type); in mlx5_fpga_mem_read() 146 void *buf, enum mlx5_fpga_access_type access_type) in mlx5_fpga_mem_write() argument 150 switch (access_type) { in mlx5_fpga_mem_write() 158 access_type); in mlx5_fpga_mem_write()
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/openbmc/qemu/target/m68k/ |
H A D | helper.c | 784 if (access_type & ACCESS_CODE) { in get_physical_address() 941 int access_type; in m68k_cpu_get_phys_page_debug() local 951 access_type |= ACCESS_SUPER; in m68k_cpu_get_phys_page_debug() 990 int access_type; in m68k_cpu_tlb_fill() local 1004 access_type = ACCESS_CODE; in m68k_cpu_tlb_fill() 1006 access_type = ACCESS_DATA; in m68k_cpu_tlb_fill() 1012 access_type |= ACCESS_SUPER; in m68k_cpu_tlb_fill() 1043 if (access_type & ACCESS_CODE) { in m68k_cpu_tlb_fill() 1487 int access_type; in HELPER() local 1492 access_type = ACCESS_PTEST; in HELPER() [all …]
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/openbmc/qemu/target/nios2/ |
H A D | helper.c | 287 MMUAccessType access_type, in nios2_cpu_do_unaligned_access() argument 299 MMUAccessType access_type, int mmu_idx, in nios2_cpu_tlb_fill() argument 331 cs->exception_index = (access_type == MMU_INST_FETCH in nios2_cpu_tlb_fill() 339 hit = mmu_translate(env, &lu, address, access_type, mmu_idx); in nios2_cpu_tlb_fill() 344 if (((access_type == MMU_DATA_LOAD) && (lu.prot & PAGE_READ)) || in nios2_cpu_tlb_fill() 345 ((access_type == MMU_DATA_STORE) && (lu.prot & PAGE_WRITE)) || in nios2_cpu_tlb_fill() 346 ((access_type == MMU_INST_FETCH) && (lu.prot & PAGE_EXEC))) { in nios2_cpu_tlb_fill() 353 excp = (access_type == MMU_DATA_LOAD ? EXCP_PERM_R : in nios2_cpu_tlb_fill() 354 access_type == MMU_DATA_STORE ? EXCP_PERM_W : EXCP_PERM_X); in nios2_cpu_tlb_fill() 356 excp = (access_type == MMU_INST_FETCH ? EXCP_TLB_X: EXCP_TLB_D); in nios2_cpu_tlb_fill() [all …]
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/openbmc/qemu/include/hw/core/ |
H A D | tcg-cpu-ops.h | 91 MMUAccessType access_type, 115 MMUAccessType access_type, uintptr_t ra); 127 MMUAccessType access_type, int mmu_idx, 134 unsigned size, MMUAccessType access_type, 142 MMUAccessType access_type,
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/openbmc/qemu/target/microblaze/ |
H A D | helper.c | 29 MMUAccessType access_type) in mb_cpu_access_is_secure() argument 31 if (access_type == MMU_INST_FETCH) { in mb_cpu_access_is_secure() 39 MMUAccessType access_type, int mmu_idx, in mb_cpu_tlb_fill() argument 49 attrs.secure = mb_cpu_access_is_secure(cpu, access_type); in mb_cpu_tlb_fill() 60 hit = mmu_translate(cpu, &lu, address, access_type, mmu_idx); in mb_cpu_tlb_fill() 83 env->esr = access_type == MMU_INST_FETCH ? 17 : 16; in mb_cpu_tlb_fill() 84 env->esr |= (access_type == MMU_DATA_STORE) << 10; in mb_cpu_tlb_fill() 87 env->esr = access_type == MMU_INST_FETCH ? 19 : 18; in mb_cpu_tlb_fill() 88 env->esr |= (access_type == MMU_DATA_STORE) << 10; in mb_cpu_tlb_fill() 273 MMUAccessType access_type, in mb_cpu_do_unaligned_access() argument
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/openbmc/qemu/target/i386/tcg/ |
H A D | helper-tcg.h | 71 MMUAccessType access_type, 75 MMUAccessType access_type, 78 MMUAccessType access_type, uintptr_t ra); 81 MMUAccessType access_type, int mmu_idx, 84 MMUAccessType access_type,
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/openbmc/qemu/target/alpha/ |
H A D | mem_helper.c | 43 MMUAccessType access_type, uintptr_t retaddr) in alpha_cpu_record_sigbus() argument 52 MMUAccessType access_type, in alpha_cpu_do_unaligned_access() argument 66 MMUAccessType access_type, in alpha_cpu_do_transaction_failed() argument 74 env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0; in alpha_cpu_do_transaction_failed()
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/openbmc/linux/tools/testing/selftests/powerpc/mm/ |
H A D | stack_expansion_ldst.c | 31 enum access_type { enum 42 int consume_stack(unsigned long target_sp, unsigned long stack_high, int delta, enum access_type ty… in consume_stack() 114 int child(unsigned int stack_used, int delta, enum access_type type) in child() 129 static int test_one(unsigned int stack_used, int delta, enum access_type type) in test_one() 157 static void test_one_type(enum access_type type, unsigned long page_size, unsigned long rlim_cur) in test_one_type()
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/openbmc/qemu/target/mips/tcg/ |
H A D | tcg-internal.h | 22 MMUAccessType access_type, int mmu_idx, 56 MMUAccessType access_type, uintptr_t retaddr); 59 MMUAccessType access_type, 65 MMUAccessType access_type, int mmu_idx,
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/openbmc/qemu/target/arm/ |
H A D | ptw.c | 1034 if (!(result->f.prot & (1 << access_type))) { in get_phys_addr_v5() 1163 if (xn && access_type == MMU_INST_FETCH) { in get_phys_addr_v6() 1193 access_type != MMU_INST_FETCH) { in get_phys_addr_v6() 1896 && access_type == MMU_DATA_STORE) { in get_phys_addr_lpae() 2000 if (!(result->f.prot & (1 << access_type))) { in get_phys_addr_lpae() 2112 if (access_type == MMU_INST_FETCH) { in get_phys_addr_pmsav5() 2431 return !(result->f.prot & (1 << access_type)); in get_phys_addr_pmsav7() 2644 return !(result->f.prot & (1 << access_type)); in pmsav8_mpu_lookup() 2787 if (access_type == MMU_INST_FETCH) { in get_phys_addr_pmsav8() 3113 if (access_type == MMU_INST_FETCH) { in get_phys_addr_disabled() [all …]
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/openbmc/qemu/target/cris/ |
H A D | mmu.c | 134 MMUAccessType access_type, in cris_mmu_translate_page() argument 154 switch (access_type) { in cris_mmu_translate_page() 222 } else if (access_type == MMU_DATA_STORE && cfg_w && !tlb_w) { in cris_mmu_translate_page() 228 } else if (access_type == MMU_INST_FETCH && cfg_x && !tlb_x) { in cris_mmu_translate_page() 277 __func__, access_type, match, env->pc, in cris_mmu_translate_page() 323 MMUAccessType access_type, int mmu_idx, int debug) in cris_mmu_translate() argument 332 env->pregs[PR_SRS] = access_type == MMU_INST_FETCH ? 1 : 2; in cris_mmu_translate() 349 miss = cris_mmu_translate_page(res, env, vaddr, access_type, in cris_mmu_translate()
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