Searched refs:a7pll (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/drivers/clk/qcom/ |
H A D | a7-pll.c | 22 static struct clk_alpha_pll a7pll = { variable 73 regmap_read(regmap, a7pll.offset + LUCID_PLL_OFF_L_VAL, &l_val); in qcom_a7pll_probe() 75 clk_lucid_pll_configure(&a7pll, regmap, &a7pll_config); in qcom_a7pll_probe() 77 ret = devm_clk_register_regmap(dev, &a7pll.clkr); in qcom_a7pll_probe() 82 &a7pll.clkr.hw); in qcom_a7pll_probe()
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,a7pll.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml# 19 - qcom,sdx55-a7pll 45 a7pll: clock@17808000 { 46 compatible = "qcom,sdx55-a7pll";
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/openbmc/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-sdx65.dtsi | 635 a7pll: clock@17808000 { label 636 compatible = "qcom,sdx55-a7pll"; 647 clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
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H A D | qcom-sdx55.dtsi | 710 a7pll: clock@17808000 { label 711 compatible = "qcom,sdx55-a7pll"; 722 clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
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