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Searched refs:_pclk_dbg (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3328.c93 #define RK3328_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
98 HIWORD_UPDATE(_pclk_dbg, RK3328_DIV_PCLK_DBG_MASK, \
102 #define RK3328_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
106 RK3328_CLKSEL1(_aclk_core, _pclk_dbg), \
H A Dclk-rk3308.c74 #define RK3308_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
79 HIWORD_UPDATE(_pclk_dbg, RK3308_DIV_PCLK_DBG_MASK, \
83 #define RK3308_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
87 RK3308_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-px30.c78 #define PX30_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
83 HIWORD_UPDATE(_pclk_dbg, PX30_DIV_PCLK_DBG_MASK, \
87 #define PX30_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
91 PX30_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rv1126.c86 #define RV1126_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
91 HIWORD_UPDATE(_pclk_dbg, RV1126_DIV_PCLK_DBG_MASK, \
95 #define RV1126_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
99 RV1126_CLKSEL1(_aclk_core, _pclk_dbg), \