xref: /openbmc/linux/arch/x86/include/asm/thread_info.h (revision af0a76e1)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* thread_info.h: low-level thread information
3  *
4  * Copyright (C) 2002  David Howells (dhowells@redhat.com)
5  * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6  */
7 
8 #ifndef _ASM_X86_THREAD_INFO_H
9 #define _ASM_X86_THREAD_INFO_H
10 
11 #include <linux/compiler.h>
12 #include <asm/page.h>
13 #include <asm/percpu.h>
14 #include <asm/types.h>
15 
16 /*
17  * TOP_OF_KERNEL_STACK_PADDING is a number of unused bytes that we
18  * reserve at the top of the kernel stack.  We do it because of a nasty
19  * 32-bit corner case.  On x86_32, the hardware stack frame is
20  * variable-length.  Except for vm86 mode, struct pt_regs assumes a
21  * maximum-length frame.  If we enter from CPL 0, the top 8 bytes of
22  * pt_regs don't actually exist.  Ordinarily this doesn't matter, but it
23  * does in at least one case:
24  *
25  * If we take an NMI early enough in SYSENTER, then we can end up with
26  * pt_regs that extends above sp0.  On the way out, in the espfix code,
27  * we can read the saved SS value, but that value will be above sp0.
28  * Without this offset, that can result in a page fault.  (We are
29  * careful that, in this case, the value we read doesn't matter.)
30  *
31  * In vm86 mode, the hardware frame is much longer still, so add 16
32  * bytes to make room for the real-mode segments.
33  *
34  * x86_64 has a fixed-length stack frame.
35  */
36 #ifdef CONFIG_X86_32
37 # ifdef CONFIG_VM86
38 #  define TOP_OF_KERNEL_STACK_PADDING 16
39 # else
40 #  define TOP_OF_KERNEL_STACK_PADDING 8
41 # endif
42 #else
43 # define TOP_OF_KERNEL_STACK_PADDING 0
44 #endif
45 
46 /*
47  * low level task data that entry.S needs immediate access to
48  * - this struct should fit entirely inside of one cache line
49  * - this struct shares the supervisor stack pages
50  */
51 #ifndef __ASSEMBLY__
52 struct task_struct;
53 #include <asm/cpufeature.h>
54 #include <linux/atomic.h>
55 
56 struct thread_info {
57 	unsigned long		flags;		/* low level flags */
58 	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
59 	u32			status;		/* thread synchronous flags */
60 #ifdef CONFIG_SMP
61 	u32			cpu;		/* current CPU */
62 #endif
63 };
64 
65 #define INIT_THREAD_INFO(tsk)			\
66 {						\
67 	.flags		= 0,			\
68 }
69 
70 #else /* !__ASSEMBLY__ */
71 
72 #include <asm/asm-offsets.h>
73 
74 #endif
75 
76 /*
77  * thread information flags
78  * - these are process state flags that various assembly files
79  *   may need to access
80  */
81 #define TIF_NOTIFY_RESUME	1	/* callback before returning to user */
82 #define TIF_SIGPENDING		2	/* signal pending */
83 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
84 #define TIF_SINGLESTEP		4	/* reenable singlestep on user return*/
85 #define TIF_SSBD		5	/* Speculative store bypass disable */
86 #define TIF_SPEC_IB		9	/* Indirect branch speculation mitigation */
87 #define TIF_SPEC_L1D_FLUSH	10	/* Flush L1D on mm switches (processes) */
88 #define TIF_USER_RETURN_NOTIFY	11	/* notify kernel of userspace return */
89 #define TIF_UPROBE		12	/* breakpointed or singlestepping */
90 #define TIF_PATCH_PENDING	13	/* pending live patching update */
91 #define TIF_NEED_FPU_LOAD	14	/* load FPU on return to userspace */
92 #define TIF_NOCPUID		15	/* CPUID is not accessible in userland */
93 #define TIF_NOTSC		16	/* TSC is not accessible in userland */
94 #define TIF_NOTIFY_SIGNAL	17	/* signal notifications exist */
95 #define TIF_MEMDIE		20	/* is terminating due to OOM killer */
96 #define TIF_POLLING_NRFLAG	21	/* idle is polling for TIF_NEED_RESCHED */
97 #define TIF_IO_BITMAP		22	/* uses I/O bitmap */
98 #define TIF_SPEC_FORCE_UPDATE	23	/* Force speculation MSR update in context switch */
99 #define TIF_FORCED_TF		24	/* true if TF in eflags artificially */
100 #define TIF_BLOCKSTEP		25	/* set when we want DEBUGCTLMSR_BTF */
101 #define TIF_LAZY_MMU_UPDATES	27	/* task is updating the mmu lazily */
102 #define TIF_ADDR32		29	/* 32-bit address space on 64 bits */
103 
104 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
105 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
106 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
107 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
108 #define _TIF_SSBD		(1 << TIF_SSBD)
109 #define _TIF_SPEC_IB		(1 << TIF_SPEC_IB)
110 #define _TIF_SPEC_L1D_FLUSH	(1 << TIF_SPEC_L1D_FLUSH)
111 #define _TIF_USER_RETURN_NOTIFY	(1 << TIF_USER_RETURN_NOTIFY)
112 #define _TIF_UPROBE		(1 << TIF_UPROBE)
113 #define _TIF_PATCH_PENDING	(1 << TIF_PATCH_PENDING)
114 #define _TIF_NEED_FPU_LOAD	(1 << TIF_NEED_FPU_LOAD)
115 #define _TIF_NOCPUID		(1 << TIF_NOCPUID)
116 #define _TIF_NOTSC		(1 << TIF_NOTSC)
117 #define _TIF_NOTIFY_SIGNAL	(1 << TIF_NOTIFY_SIGNAL)
118 #define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
119 #define _TIF_IO_BITMAP		(1 << TIF_IO_BITMAP)
120 #define _TIF_SPEC_FORCE_UPDATE	(1 << TIF_SPEC_FORCE_UPDATE)
121 #define _TIF_FORCED_TF		(1 << TIF_FORCED_TF)
122 #define _TIF_BLOCKSTEP		(1 << TIF_BLOCKSTEP)
123 #define _TIF_LAZY_MMU_UPDATES	(1 << TIF_LAZY_MMU_UPDATES)
124 #define _TIF_ADDR32		(1 << TIF_ADDR32)
125 
126 /* flags to check in __switch_to() */
127 #define _TIF_WORK_CTXSW_BASE					\
128 	(_TIF_NOCPUID | _TIF_NOTSC | _TIF_BLOCKSTEP |		\
129 	 _TIF_SSBD | _TIF_SPEC_FORCE_UPDATE)
130 
131 /*
132  * Avoid calls to __switch_to_xtra() on UP as STIBP is not evaluated.
133  */
134 #ifdef CONFIG_SMP
135 # define _TIF_WORK_CTXSW	(_TIF_WORK_CTXSW_BASE | _TIF_SPEC_IB)
136 #else
137 # define _TIF_WORK_CTXSW	(_TIF_WORK_CTXSW_BASE)
138 #endif
139 
140 #ifdef CONFIG_X86_IOPL_IOPERM
141 # define _TIF_WORK_CTXSW_PREV	(_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY | \
142 				 _TIF_IO_BITMAP)
143 #else
144 # define _TIF_WORK_CTXSW_PREV	(_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY)
145 #endif
146 
147 #define _TIF_WORK_CTXSW_NEXT	(_TIF_WORK_CTXSW)
148 
149 #define STACK_WARN		(THREAD_SIZE/8)
150 
151 /*
152  * macros/functions for gaining access to the thread information structure
153  *
154  * preempt_count needs to be 1 initially, until the scheduler is functional.
155  */
156 #ifndef __ASSEMBLY__
157 
158 /*
159  * Walks up the stack frames to make sure that the specified object is
160  * entirely contained by a single stack frame.
161  *
162  * Returns:
163  *	GOOD_FRAME	if within a frame
164  *	BAD_STACK	if placed across a frame boundary (or outside stack)
165  *	NOT_STACK	unable to determine (no frame pointers, etc)
166  *
167  * This function reads pointers from the stack and dereferences them. The
168  * pointers may not have their KMSAN shadow set up properly, which may result
169  * in false positive reports. Disable instrumentation to avoid those.
170  */
171 __no_kmsan_checks
arch_within_stack_frames(const void * const stack,const void * const stackend,const void * obj,unsigned long len)172 static inline int arch_within_stack_frames(const void * const stack,
173 					   const void * const stackend,
174 					   const void *obj, unsigned long len)
175 {
176 #if defined(CONFIG_FRAME_POINTER)
177 	const void *frame = NULL;
178 	const void *oldframe;
179 
180 	oldframe = __builtin_frame_address(1);
181 	if (oldframe)
182 		frame = __builtin_frame_address(2);
183 	/*
184 	 * low ----------------------------------------------> high
185 	 * [saved bp][saved ip][args][local vars][saved bp][saved ip]
186 	 *                     ^----------------^
187 	 *               allow copies only within here
188 	 */
189 	while (stack <= frame && frame < stackend) {
190 		/*
191 		 * If obj + len extends past the last frame, this
192 		 * check won't pass and the next frame will be 0,
193 		 * causing us to bail out and correctly report
194 		 * the copy as invalid.
195 		 */
196 		if (obj + len <= frame)
197 			return obj >= oldframe + 2 * sizeof(void *) ?
198 				GOOD_FRAME : BAD_STACK;
199 		oldframe = frame;
200 		frame = *(const void * const *)frame;
201 	}
202 	return BAD_STACK;
203 #else
204 	return NOT_STACK;
205 #endif
206 }
207 
208 #endif  /* !__ASSEMBLY__ */
209 
210 /*
211  * Thread-synchronous status.
212  *
213  * This is different from the flags in that nobody else
214  * ever touches our thread-synchronous status, so we don't
215  * have to worry about atomic accesses.
216  */
217 #define TS_COMPAT		0x0002	/* 32bit syscall active (64BIT)*/
218 
219 #ifndef __ASSEMBLY__
220 #ifdef CONFIG_COMPAT
221 #define TS_I386_REGS_POKED	0x0004	/* regs poked by 32-bit ptracer */
222 
223 #define arch_set_restart_data(restart)	\
224 	do { restart->arch_data = current_thread_info()->status; } while (0)
225 
226 #endif
227 
228 #ifdef CONFIG_X86_32
229 #define in_ia32_syscall() true
230 #else
231 #define in_ia32_syscall() (IS_ENABLED(CONFIG_IA32_EMULATION) && \
232 			   current_thread_info()->status & TS_COMPAT)
233 #endif
234 
235 extern void arch_setup_new_exec(void);
236 #define arch_setup_new_exec arch_setup_new_exec
237 #endif	/* !__ASSEMBLY__ */
238 
239 #endif /* _ASM_X86_THREAD_INFO_H */
240