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Searched refs:_REG (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vpu_init.c24 writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); in meson_vpp_setup_mux()
46 priv->io_base + _REG(VPP_OSD_SCALE_COEF_IDX)); in meson_vpp_write_scaling_filter_coefs()
49 priv->io_base + _REG(VPP_OSD_SCALE_COEF)); in meson_vpp_write_scaling_filter_coefs()
71 priv->io_base + _REG(VPP_SCALE_COEF_IDX)); in meson_vpp_write_vd_scaling_filter_coefs()
74 priv->io_base + _REG(VPP_SCALE_COEF)); in meson_vpp_write_vd_scaling_filter_coefs()
122 priv->io_base + _REG(VIU_OSD1_MATRIX_PRE_OFFSET0_1)); in meson_viu_set_osd_matrix()
124 priv->io_base + _REG(VIU_OSD1_MATRIX_PRE_OFFSET2)); in meson_viu_set_osd_matrix()
126 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF00_01)); in meson_viu_set_osd_matrix()
128 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF02_10)); in meson_viu_set_osd_matrix()
130 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF11_12)); in meson_viu_set_osd_matrix()
[all …]
H A Dmeson_venc.c841 priv->io_base + _REG(VENC_VDAC_SETTING)); in meson_venc_hdmi_mode_set()
843 writel(0, priv->io_base + _REG(ENCI_VIDEO_EN)); in meson_venc_hdmi_mode_set()
844 writel(0, priv->io_base + _REG(ENCP_VIDEO_EN)); in meson_venc_hdmi_mode_set()
853 writel(0x12, priv->io_base + _REG(ENCI_CFILT_CTRL)); in meson_venc_hdmi_mode_set()
854 writel(0x12, priv->io_base + _REG(ENCI_CFILT_CTRL2)); in meson_venc_hdmi_mode_set()
857 writel(0, priv->io_base + _REG(VENC_DVI_SETTING)); in meson_venc_hdmi_mode_set()
860 writel(0, priv->io_base + _REG(ENCI_VIDEO_MODE)); in meson_venc_hdmi_mode_set()
861 writel(0, priv->io_base + _REG(ENCI_VIDEO_MODE_ADV)); in meson_venc_hdmi_mode_set()
865 priv->io_base + _REG(ENCI_SYNC_HSO_BEGIN)); in meson_venc_hdmi_mode_set()
867 priv->io_base + _REG(ENCI_SYNC_HSO_END)); in meson_venc_hdmi_mode_set()
[all …]
H A Dmeson_plane.c61 priv->io_base + _REG(VPP_OSD_SC_CTRL0)); in meson_vpp_setup_interlace_vscaler_osd1()
64 priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); in meson_vpp_setup_interlace_vscaler_osd1()
67 priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); in meson_vpp_setup_interlace_vscaler_osd1()
69 priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); in meson_vpp_setup_interlace_vscaler_osd1()
72 writel(BIT(16), priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); in meson_vpp_setup_interlace_vscaler_osd1()
73 writel(BIT(25), priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); in meson_vpp_setup_interlace_vscaler_osd1()
75 writel(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); in meson_vpp_setup_interlace_vscaler_osd1()
84 priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); in meson_vpp_setup_interlace_vscaler_osd1()
90 writel(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); in meson_vpp_disable_interlace_vscaler_osd1()
91 writel(0, priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); in meson_vpp_disable_interlace_vscaler_osd1()
[all …]
H A Dmeson_registers.h10 #define _REG(reg) ((reg) << 2) macro
/openbmc/u-boot/arch/x86/include/asm/arch-tangier/acpi/
H A Dsouthcluster.asl258 Method (_REG, 2, NotSerialized)
415 Method (_REG, 2, NotSerialized)