Home
last modified time | relevance | path

Searched refs:_MASKED_BIT_DISABLE (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dreg.h99 ((_val) & _MASKED_BIT_DISABLE(_b))
H A Dhandlers.c2113 else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()
/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_reg_defs.h205 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0)) macro
H A Dintel_clock_gating.c742 _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); in gen3_init_clock_gating()
761 _MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE)); in i85x_init_clock_gating()
H A Di915_perf.c2982 _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE)); in gen12_disable_metric_set()
2984 _MASKED_BIT_DISABLE(GEN12_DISABLE_DOP_GATING)); in gen12_disable_metric_set()
H A Dintel_uncore.c125 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_pm.c27 _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); in intel_gsc_idle_msg_enable()
H A Dintel_ring_submission.c249 RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in xcs_resume()
784 *cs++ = _MASKED_BIT_DISABLE( in mi_set_context()
1038 _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE)); in gen6_bsd_submit_request()
H A Dintel_lrc.c857 ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT); in init_common_regs()
861 ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT | in init_common_regs()
H A Dintel_rc6.c779 _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH)); in vlv_residency_raw()
H A Dintel_workarounds.c317 wa_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_masked_dis()
323 wa_mcr_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_mcr_masked_dis()
H A Dintel_reset.c607 _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)); in gen8_engine_reset_cancel()
H A Dintel_engine_cs.c1700 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
H A Dintel_execlists_submission.c2945 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in enable_execlists()
/openbmc/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp.c68 _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES); in kcr_pxp_set_status()
/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_uc_fw.c1104 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
H A Dintel_guc_submission.c4149 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in start_engine()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_irq.c1324 …intel_uncore_write(&dev_priv->uncore, SCPD0, _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE)… in i915gm_disable_vblank()
H A Di9xx_wm.c164 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN); in _intel_set_memory_cxsr()
175 _MASKED_BIT_DISABLE(INSTPM_SELF_EN); in _intel_set_memory_cxsr()