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Searched refs:ZQnPR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a83t.c333 clrsetbits_le32(ZQnPR(0), 0x000000ff, CONFIG_DRAM_ZQ & 0xff); in mctl_channel_init()
334 clrsetbits_le32(ZQnPR(1), 0x000000ff, (CONFIG_DRAM_ZQ >> 8) & 0xff); in mctl_channel_init()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun8i_a83t.h146 #define ZQnPR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000144 + 0x10 * x) macro