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Searched refs:XX3 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dinsn32.decode241 &XX3 xt xa xb
242 @XX3 ...... ..... ..... ..... ........ ... &XX3 xt=%xx_xt xa=%xx_xa xb=%xx_xb
1036 XVCPSGNDP 111100 ..... ..... ..... 11110000 ... @XX3
1037 XVCPSGNSP 111100 ..... ..... ..... 11010000 ... @XX3
1041 XSADDSP 111100 ..... ..... ..... 00000000 ... @XX3
1042 XSSUBSP 111100 ..... ..... ..... 00001000 ... @XX3
1043 XSMULSP 111100 ..... ..... ..... 00010000 ... @XX3
1044 XSDIVSP 111100 ..... ..... ..... 00011000 ... @XX3
1046 XSADDDP 111100 ..... ..... ..... 00100000 ... @XX3
1047 XSSUBDP 111100 ..... ..... ..... 00101000 ... @XX3
[all …]
H A Dinsn64.decode71 # Format MMIRR:XX3
/openbmc/linux/arch/powerpc/xmon/
H A Dppc-opc.c2594 #define XX3(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0xff) << 3)) macro
2651 #define XX3_MASK XX3 (0x3f, 0xff)
2654 #define XX3BF_MASK (XX3 (0x3f, 0xff) | (3 << 21) | (1))
2657 #define XX3DM_MASK (XX3 (0x3f, 0x1f) | (1 << 10))
6463 {"xsaddsp", XX3(60,0), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
6464 {"xsmaddasp", XX3(60,1), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
6465 {"xxsldwi", XX3(60,2), XX3SHW_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, SHW}},
6466 {"xscmpeqdp", XX3(60,3), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},
6470 {"xssubsp", XX3(60,8), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
6471 {"xsmaddmsp", XX3(60,9), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
[all …]