Searched refs:XWT_CSR0_EWDT1_MASK (Results 1 – 2 of 2) sorted by relevance
18 #define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 Mask*/ macro43 if (reg & (XWT_CSR0_EWDT1_MASK | XWT_CSRX_EWDT2_MASK)) in xlnx_wdt_reset()62 writel(reg & ~XWT_CSR0_EWDT1_MASK, &platdata->regs->twcsr0); in xlnx_wdt_stop()76 writel((XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK | XWT_CSR0_EWDT1_MASK), in xlnx_wdt_start()
29 #define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */ macro66 iowrite32((control_status_reg | XWT_CSR0_EWDT1_MASK), in xilinx_wdt_start()87 iowrite32((control_status_reg & ~XWT_CSR0_EWDT1_MASK), in xilinx_wdt_stop()