Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD (Results 1 – 1 of 1) sorted by relevance
204 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD (1 << 15) macro242 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; in pcie_phy_enable()385 value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; in pcie_phy_enable()