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Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dxusb-padctl.c204 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD (1 << 15) macro
242 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; in pcie_phy_enable()
385 value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; in pcie_phy_enable()