Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_EN (Results 1 – 1 of 1) sorted by relevance
192 #define XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_EN (1 << 15) macro249 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL4_TXCLKREF_EN; in pcie_phy_enable()