Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ (Results 1 – 1 of 1) sorted by relevance
182 #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ (1 << 0) macro259 value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ; in pcie_phy_enable()