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Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dxusb-padctl.c173 #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 macro
233 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
235 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
252 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
256 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
258 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
260 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
262 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
264 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
310 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
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/openbmc/linux/drivers/phy/tegra/
H A Dxusb-tegra210.c170 #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 macro
500 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
502 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
522 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
529 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
531 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
533 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
535 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
538 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
584 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
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