Searched refs:XEL_TSR_XMIT_BUSY_MASK (Results 1 – 2 of 2) sorted by relevance
29 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL macro35 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)388 return !(tmp & XEL_TSR_XMIT_BUSY_MASK); in xemaclite_txbufferavailable()419 if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { in emaclite_send()427 reg |= XEL_TSR_XMIT_BUSY_MASK; in emaclite_send()435 if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { in emaclite_send()444 reg |= XEL_TSR_XMIT_BUSY_MASK; in emaclite_send()
65 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */ macro74 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)322 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | in xemaclite_send_data()336 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | in xemaclite_send_data()355 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); in xemaclite_send_data()655 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && in xemaclite_interrupt()665 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && in xemaclite_interrupt()