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Searched refs:XELPDP_PORT_M2P_MSGBUS_CTL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c93 intel_de_write(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in intel_cx0_bus_reset()
96 if (intel_de_wait_for_clear(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in intel_cx0_bus_reset()
147 if (intel_de_wait_for_clear(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in __intel_cx0_read_once()
156 intel_de_write(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in __intel_cx0_read_once()
207 if (intel_de_wait_for_clear(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in __intel_cx0_write_once()
216 intel_de_write(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in __intel_cx0_write_once()
223 if (intel_de_wait_for_clear(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in __intel_cx0_write_once()
2477 if (intel_de_wait_for_clear(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port, lane), in intel_cx0_powerdown_change_sequence()
H A Dintel_cx0_phy_regs.h15 #define XELPDP_PORT_M2P_MSGBUS_CTL(port, lane) _MMIO(_PICK_EVEN_2RANGES(port, PORT_TC1, \ macro