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Searched refs:XCHAL_HAVE_DATARAM0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h308 #define XCHAL_HAVE_DATARAM0 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h326 #define XCHAL_HAVE_DATARAM0 macro