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Searched refs:XCHAL_FUSIONG_SIMD32 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h145 #define XCHAL_FUSIONG_SIMD32 0 /* simd32 for FusionG */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h156 #define XCHAL_FUSIONG_SIMD32 0 /* simd32 for FusionG */ macro