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Searched refs:XCHAL_DATARAM0_VADDR (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h240 #define XCHAL_DATARAM0_VADDR 0x3FFC0000 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h233 #define XCHAL_DATARAM0_VADDR 0x5FFD0000 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h297 #define XCHAL_DATARAM0_VADDR 0x3FFE0000 /* virtual address */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h275 #define XCHAL_DATARAM0_VADDR 0x3FFE0000 /* virtual address */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h303 #define XCHAL_DATARAM0_VADDR 0x3FFE0000 /* virtual address */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h321 #define XCHAL_DATARAM0_VADDR 0x3FFE0000 /* virtual address */ macro